From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 180EDC433F5 for ; Fri, 22 Apr 2022 08:00:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1445437AbiDVIC6 (ORCPT ); Fri, 22 Apr 2022 04:02:58 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42372 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1445433AbiDVICd (ORCPT ); Fri, 22 Apr 2022 04:02:33 -0400 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 42EDB522DB; Fri, 22 Apr 2022 00:59:34 -0700 (PDT) X-UUID: 07d33d54a5f64cbca11cc0f602d23146-20220422 X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.4,REQID:b6f8feab-30f0-4076-b9ad-efc5c60dbb00,OB:0,LO B:0,IP:0,URL:25,TC:0,Content:0,EDM:0,RT:0,SF:0,FILE:0,RULE:Release_Ham,ACT ION:release,TS:25 X-CID-META: VersionHash:faefae9,CLOUDID:f691c1ef-06b0-4305-bfbf-554bfc9d151a,C OID:IGNORED,Recheck:0,SF:nil,TC:nil,Content:0,EDM:-3,File:nil,QS:0,BEC:nil X-UUID: 07d33d54a5f64cbca11cc0f602d23146-20220422 Received: from mtkexhb01.mediatek.inc [(172.21.101.102)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 938408934; Fri, 22 Apr 2022 15:59:26 +0800 Received: from mtkexhb02.mediatek.inc (172.21.101.103) by mtkmbs07n2.mediatek.inc (172.21.101.141) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 22 Apr 2022 15:59:16 +0800 Received: from mtkcas11.mediatek.inc (172.21.101.40) by mtkexhb02.mediatek.inc (172.21.101.103) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 22 Apr 2022 15:59:16 +0800 Received: from mtksdccf07 (172.21.84.99) by mtkcas11.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 22 Apr 2022 15:59:16 +0800 Message-ID: <177a0be5289045602fdbde295b1bd076bee9e854.camel@mediatek.com> Subject: Re: [PATCH v1] dt-bindings: dsp: mediatek: add mt8186 dsp document From: Rex-BC Chen To: Tinghan Shen , Rob Herring , Krzysztof Kozlowski , "Matthias Brugger" CC: , , , , Date: Fri, 22 Apr 2022 15:59:15 +0800 In-Reply-To: <20220422071534.15653-1-tinghan.shen@mediatek.com> References: <20220422071534.15653-1-tinghan.shen@mediatek.com> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.28.5-0ubuntu0.18.04.2 MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, 2022-04-22 at 15:15 +0800, Tinghan Shen wrote: > This patch adds mt8186 dsp document. The dsp is used for Sound Open > Firmware driver node. It includes registers, clocks, memory regions, > and mailbox for dsp. > > Signed-off-by: Tinghan Shen > --- > > This patch depends on MT8186 clock bindings. > https://lore.kernel.org/all/20220409132251.31725-2-chun-jie.chen@mediatek.com/ > > --- > .../bindings/dsp/mediatek,mt8186-dsp.yaml | 93 > +++++++++++++++++++ > 1 file changed, 93 insertions(+) > create mode 100644 > Documentation/devicetree/bindings/dsp/mediatek,mt8186-dsp.yaml > > diff --git a/Documentation/devicetree/bindings/dsp/mediatek,mt8186- > dsp.yaml b/Documentation/devicetree/bindings/dsp/mediatek,mt8186- > dsp.yaml > new file mode 100644 > index 000000000000..00a79e880895 > --- /dev/null > +++ b/Documentation/devicetree/bindings/dsp/mediatek,mt8186-dsp.yaml > @@ -0,0 +1,93 @@ > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/dsp/mediatek,mt8186-dsp.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Mediatek mt8186 DSP core Hello Tinghan, Please use MediaTek. Thanks. BRs, Rex > + > +maintainers: > + - Tinghan Shen > + > +description: | > + MediaTek mt8186 SoC contains a DSP core used for > + advanced pre- and post- audio processing. > + > +properties: > + compatible: > + const: mediatek,mt8186-dsp > + > + reg: > + items: > + - description: Address and size of the DSP config registers > + - description: Address and size of the DSP SRAM > + - description: Address and size of the DSP secure registers > + - description: Address and size of the DSP bus registers > + > + reg-names: > + items: > + - const: cfg > + - const: sram > + - const: sec > + - const: bus > + > + clocks: > + items: > + - description: mux for audio dsp clock > + - description: mux for audio dsp local bus > + > + clock-names: > + items: > + - const: audiodsp_sel > + - const: adsp_bus_sel > + > + power-domains: > + maxItems: 1 > + > + mboxes: > + items: > + - description: ipc reply between host and audio DSP. > + - description: ipc request between host and audio DSP. > + > + mbox-names: > + items: > + - const: mbox0 > + - const: mbox1 > + > + memory-region: > + items: > + - description: dma buffer between host and DSP. > + - description: DSP system memory. > + > +required: > + - compatible > + - reg > + - reg-names > + - clocks > + - clock-names > + - power-domains > + - mbox-names > + - mboxes > + > +additionalProperties: false > + > +examples: > + - | > + #include > + #include > + #include > + dsp@10680000 { > + compatible = "mediatek,mt8186-dsp"; > + reg = <0x10680000 0x2000>, > + <0x10800000 0x100000>, > + <0x1068b000 0x100>, > + <0x1068f000 0x1000>; > + reg-names = "cfg", "sram", "sec", "bus"; > + clocks = <&topckgen CLK_TOP_AUDIODSP>, > + <&topckgen CLK_TOP_ADSP_BUS>; > + clock-names = "audiodsp_sel", > + "adsp_bus_sel"; > + power-domains = <&spm 6>; > + mbox-names = "mbox0", "mbox1"; > + mboxes = <&adsp_mailbox0>, <&adsp_mailbox1>; > + };