From: Jani Nikula <jani.nikula@linux.intel.com>
To: Yaroslav <iam@0la.ch>, "Yaroslav Bolyukin" <iam@lach.pw>,
"Ville Syrjälä" <ville.syrjala@linux.intel.com>,
"Maarten Lankhorst" <maarten.lankhorst@linux.intel.com>,
"Maxime Ripard" <mripard@kernel.org>,
"Thomas Zimmermann" <tzimmermann@suse.de>,
"David Airlie" <airlied@gmail.com>,
"Simona Vetter" <simona@ffwll.ch>
Cc: "Harry Wentland" <harry.wentland@amd.com>,
"Leo Li" <sunpeng.li@amd.com>,
"Rodrigo Siqueira" <siqueira@igalia.com>,
"Alex Deucher" <alexander.deucher@amd.com>,
"Christian König" <christian.koenig@amd.com>,
"Wayne Lin" <Wayne.Lin@amd.com>,
amd-gfx@lists.freedesktop.org, linux-kernel@vger.kernel.org,
dri-devel@lists.freedesktop.org
Subject: Re: [PATCH v6 4/7] drm/edid: parse DSC DPP passthru support flag for mode VII timings
Date: Wed, 26 Nov 2025 16:52:23 +0200 [thread overview]
Message-ID: <17f7e5e7d45bab4324968e352231f739bbdf7366@intel.com> (raw)
In-Reply-To: <c32eb9e4-41fa-4d17-a214-d7f594f34d82@0la.ch>
On Wed, 26 Nov 2025, Yaroslav <iam@0la.ch> wrote:
> On 2025-11-26 15:19, Jani Nikula wrote:
>> On Wed, 26 Nov 2025, Yaroslav Bolyukin <iam@lach.pw> wrote:
>>> + if (type_7 && FIELD_GET(DISPLAYID_BLOCK_REV, block->rev) >= 1)
>>> + mode->dsc_passthrough_timings_support =
>>> + !!(block->rev & DISPLAYID_BLOCK_PASSTHROUGH_TIMINGS_SUPPORT);
>>
>> The !! and parentheses are superfluous.
>>
>
> Most of the other instances of bitflag parsing logic in kernel seem to
> cast integers to booleans explicitly this way.
>
> I'm fine with simplifying that, I was only doing what everyone else does.
I get that, but such habits originate from the days before std bool. !!
normalizes ints to 0 and 1, but assigning to bool does the same for you.
BR,
Jani.
--
Jani Nikula, Intel
next prev parent reply other threads:[~2025-11-26 14:52 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-11-26 6:51 [PATCH v6 0/7] VESA DisplayID spec allows the device to force its DSC bits per pixel value Yaroslav Bolyukin
2025-11-26 6:51 ` [PATCH v6 1/7] drm/edid: rename VESA block parsing functions to more generic name Yaroslav Bolyukin
2025-11-26 9:05 ` Jani Nikula
2025-11-26 6:51 ` [PATCH v6 2/7] drm/edid: prepare for VESA vendor-specific data block extension Yaroslav Bolyukin
2025-11-26 9:13 ` Jani Nikula
2025-11-26 14:08 ` Jani Nikula
2025-11-26 14:50 ` Yaroslav
2025-11-26 14:59 ` Jani Nikula
2025-11-26 15:06 ` Yaroslav
2025-11-26 15:26 ` Yaroslav
2025-11-26 16:32 ` Jani Nikula
2025-11-26 14:20 ` Yaroslav
2025-11-26 14:29 ` Jani Nikula
2025-11-26 14:41 ` Yaroslav
2025-11-26 14:47 ` Jani Nikula
2025-11-26 14:53 ` Yaroslav
2025-11-26 6:51 ` [PATCH v6 3/7] drm/edid: MSO should only be used for non-eDP displays Yaroslav Bolyukin
2025-11-26 14:10 ` Jani Nikula
2025-11-26 14:22 ` Yaroslav
2025-11-26 6:51 ` [PATCH v6 4/7] drm/edid: parse DSC DPP passthru support flag for mode VII timings Yaroslav Bolyukin
2025-11-26 14:19 ` Jani Nikula
2025-11-26 14:35 ` Yaroslav
2025-11-26 14:52 ` Jani Nikula [this message]
2025-11-26 6:51 ` [PATCH v6 5/7] drm/edid: for consistency, use mask everywhere for block rev parsing Yaroslav Bolyukin
2025-11-26 14:20 ` Jani Nikula
2025-11-26 6:51 ` [PATCH v6 6/7] drm/edid: parse DRM VESA dsc bpp target Yaroslav Bolyukin
2025-11-26 14:25 ` Jani Nikula
2025-11-26 6:51 ` [PATCH v6 7/7] drm/amd: use fixed dsc bits-per-pixel from edid Yaroslav Bolyukin
2025-11-26 7:13 ` [PATCH v6 0/7] VESA DisplayID spec allows the device to force its DSC bits per pixel value Yaroslav
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