From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752428AbbI1Tir (ORCPT ); Mon, 28 Sep 2015 15:38:47 -0400 Received: from mout.kundenserver.de ([212.227.126.130]:59457 "EHLO mout.kundenserver.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751510AbbI1Tip (ORCPT ); Mon, 28 Sep 2015 15:38:45 -0400 From: Arnd Bergmann To: Rob Herring Cc: Ley Foon Tan , Bjorn Helgaas , Russell King , Marc Zyngier , Dinh Nguyen , "linux-pci@vger.kernel.org" , "devicetree@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "linux-doc@vger.kernel.org" , "linux-kernel@vger.kernel.org" , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , Lorenzo Pieralisi Subject: Re: [PATCH v7 5/6] Documentation: dt-bindings: pci: altera pcie device tree binding Date: Mon, 28 Sep 2015 21:38:33 +0200 Message-ID: <1803658.W77SUJGE4K@wuerfel> User-Agent: KMail/4.11.5 (Linux/3.16.0-10-generic; KDE/4.11.5; x86_64; ; ) In-Reply-To: References: <1442801587-3812-1-git-send-email-lftan@altera.com> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" X-Provags-ID: V03:K0:/hHTYzb2QdEHACj4dbhFLTC1b2hNkU7qEqs1tovmpYksofB3wVt UddbhQknHZWkvn+hUyeYcuevKXJGdVRwmo2KxeE9ywrZcxzDN+Mcfz1VpaZ84gUXt8kzflD /29e2SLy7aMPgnQ35uTW1wLgG0PIfnry+STD8oSiGkngjzzC/Bbcli6GPCG4qJxMogLB16E HS0fnUAiuXciQkL4yDspw== X-UI-Out-Filterresults: notjunk:1;V01:K0:NagNSuMlIvs=:R0kCExoLhOAXFhFycblkAm RNtz8idzPMrPjaS+lGd21DTtsC5L7/Dvul/c5QjxWQUBOTcGqkGDkwJibdae0x3xpYNSFgy/E 0qAtJsp69i3ih8RJSIw2x7nG9G7Y/wRgT3GM8eQ4PlYTh3RYtm9SfwinpS3jhvK2SGX44DtRz TAPSrwwZWvink5GX7gmT/1uY0yKhRvavj/oS94Zded/shITB4gojDqe9iWqDAdouxdDUZq/mT CkAaISPdUhvwYZmF1JZfq+88tuoZj2eXKuEKnXkzUujCd2dfIBIJN9UwNE633EVlizZsfoucn fWFzH/ZLlcEHbBNvuudJ6UVzZLhiDZmo8VsNOpOD6CGWfOEXEg0GqjoxtgKFGxk8SnBHvZ9UZ i4bOLta5rGuHr9sbUGP4tdNO9mT1WoAdRQzpEP6BoOx8EtCv4nfYiUQPhYu6kL+EA9/U9/kJh UR9CQFUDTn7fOVxOaiUkiJ8C6wLHjqgdsNanUozLNY1yt5fzBdbAxigYA4pGxzCgSBUykbwmE fSJKeVXtCKnurLFZ8TZtBWMKjy5fUxRXN+4GBotlzLG1Pei2gakzst55M5Tv0kYyETMmEULsu oo4C9q1dVVPJYfO4JFWzxQ+fns3HVoDEQUzbY31uMmSzhp8wJWDr5+6qHBZyAoyB5LhgOKgDs 81BcOaY0iGogrPd/bc7khBwhFof4IcNuolbBIvN9jpul5iblly1S4Z7/b7Fra7fLvC8nnOtuj D8T5M1LcGCzWexkO Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Monday 28 September 2015 12:31:36 Rob Herring wrote: > >> > + > >> > +Required properties: > >> > +- compatible : should contain "altr,pcie-root-port-1.0" > >> > +- reg: a list of physical base address and length for TXS and CRA. > >> > +- reg-names: must include the following entries: > >> > + "Txs" or "txs": TX slave port region > >> > + "Cra" or "cra": Control register access region > >> > >> Why both cases? Can we please just have one (or none is better IMO). > > The PCIe IP on different device families use different register names. > > And our device tree generator will auto generate the register names > > based on the hardware description name. Too bad we can't change the > > hardware description names now. > > Okay, your problem to maintain. Hopefully the driver just goes by index then. > > Strictly speaking, if you have undocumented bindings downstream that > is your problem and we don't have to accept them as-is upstream. I'm > not going to worry about that here. Are they always in the same order? If you don't mandate any names for the registers in the binding but just use them by index, we can keep that bit of ugliness out of the binding and the driver and still be compatible with all the devices. Arnd