Re: [PATCH 3/3] dt-bindings: clock: add TI CDCE6214 binding

[Krzysztof Kozlowski <krzk@kernel.org>]

On 08/04/2025 17:02, Sascha Hauer wrote:
>>> +  clock-names:
>>> +    minItems: 1
>>> +    items:
>>> +      - const: priref
>>> +      - const: secref
>>
>> So one input is optional?
> 
> The chip has two clock inputs and to be operational it needs at least
> one clock, could be priref or secref or both.
> 
> Is there a proper way to express this situation?

No, this is fine, I just wanted to be sure that's the intention.

> 
> 
>>> +  "^clk@[2-9]$":
>>> +    type: object
>>> +    description: |
>>> +      optional child node that can be used to specify output pin parameters.  The reg
>>> +      properties match the CDCE6214_CLK_* defines.
>>> +
>>> +    additionalProperties: false
>>> +
>>> +    properties:
>>> +      reg:
>>> +        description:
>>> +          clock output identifier.
>>> +        minimum: 2
>>> +        maximum: 9
>>> +
>>> +      ti,lphcsl:
>>> +        type: boolean
>>> +        description: |
>>> +          If true enable LP-HCSL output mode for this clock
>>> +
>>> +      ti,lvds:
>>> +        type: boolean
>>> +        description: |
>>> +          If true enable LVDS output mode for this clock
>>> +
>>> +      ti,cmosp:
>>> +        type: boolean
>>> +        description: |
>>> +          If true enable CMOSP output for this clock
>>> +
>>> +      ti,cmosn:
>>> +        type: boolean
>>> +        description: |
>>> +          If true enable CMOSN output for this clock
>>
>> Looks the same here. Anyway having these as subnodes is too much. You
>> have fixed number of clocks, so you need one or two array properties in
>> top-level.
> 
> There are several properties I haven't yet modeled, like
> 
> - 1.8V / 2.5V output
> - sync_delay
> - LVDS common-mode trim increment/decrement
> - differential buffer BIAS trim
> - slew rate
> - BIAS current setting for XTAL mode
> - load capacity for XTAL mode
> 
> I don't know which of them will ever be supported, but I thought having a
> node per pin would add a natural place to add these properties. Do you
> still think arrays would be more appropriate?

Binding is supposed to be complete. If you send incomplete, you get
review like that.

Several of these look like pinctrl thus maybe this should be pin
controller as well. It's not exactly GPIO, but still configuring
specific functions and pin characteristics is the exact job of pinctrl.

> 
>>
>>> +
>>> +required:
>>> +  - compatible
>>> +  - reg
>>> +  - clocks
>>> +  - "#clock-cells"
>>> +
>>> +additionalProperties: false
>>> +
>>> +examples:
>>> +  - |
>>> +    #include <dt-bindings/clock/ti,cdce6214.h>
>>
>> This file does not exist. Something is odd in this example.
> 
> It is added in the driver patch. Should it come with the binding patch
> instead?

Yes, because it is a binding.

> 
>>
>>> +    i2c {
>>> +        #address-cells = <1>;
>>> +        #size-cells = <0>;
>>> +
>>> +        clock-generator@67 {
>>> +            compatible = "ti,cdce6214";
>>> +            reg = <0x67>;
>>> +            #address-cells = <1>;
>>> +            #size-cells = <0>;
>>> +            #clock-cells = <1>;
>>> +            clocks = <&clock_ref25m>;
>>> +            clock-names = "priref";
>>> +
>>> +            clk@CDCE6214_CLK_SECREF {
>>
>> That's not a valid unit address. Use simple numbers, see DT spec and DTS
>> coding style.
> 
> CDCE6214_CLK_SECREF is a macro added in dt-bindings/clock/ti,cdce6214.h
> and it expands to a simple number (1 in this case). While I haven't
> found any examples of someone using macros for the unit address / reg
> property I thought I'd give it a try as it nicely shows how it is used.
> 
> I can switch to plain numbers if you prefer that though.

We don't encode addresses as headers in DTS (with few exception), so
definitely not as a binding. It just does not bind anything (in the ABI).

Best regards,
Krzysztof