From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755499AbdIGQKO (ORCPT ); Thu, 7 Sep 2017 12:10:14 -0400 Received: from mailout2.samsung.com ([203.254.224.25]:11768 "EHLO mailout2.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754958AbdIGQKK (ORCPT ); Thu, 7 Sep 2017 12:10:10 -0400 X-AuditID: b6c32a35-f798c6d000005940-4f-59b16f5fdc53 From: Bartlomiej Zolnierkiewicz To: Krzysztof Kozlowski , Willy Wolff Cc: Rob Herring , Mark Rutland , Russell King , Kukjin Kim , linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Bartlomiej Zolnierkiewicz Subject: [PATCH v2] ARM: dts: exynos: fix incomplete Odroid-XU3/4 thermal-zones definition Date: Thu, 07 Sep 2017 18:10 +0200 Message-id: <1848394.K3C0KxojUN@amdc3058> User-Agent: KMail/4.13.3 (Linux/3.13.0-96-generic; KDE/4.13.3; x86_64; ; ) MIME-version: 1.0 Content-transfer-encoding: 7Bit Content-type: text/plain; charset="us-ascii" X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprGKsWRmVeSWpSXmKPExsWy7bCmrm5C/sZIg+P3mCw2zljPajH/yDlW i/7Hr5ktzp/fwG6x6fE1VovLu+awWcw4v4/J4tDUvYwWS69fZLJo3XuE3WJm6zcWB26PNfPW MHpcvnaR2WPnrLvsHptWdbJ5bF5S79G3ZRWjx+dNcgHsUVw2Kak5mWWpRfp2CVwZa6+XFxz2 qGg5s5mpgfG4URcjJ4eEgInE5T/3WCBsMYkL99azdTFycQgJ7GCUmNl2hBnC+c4o8W/+JxaY jpVnP7JAJHYzSnRv2gRV9ZVRYs+Lq0wgVWwCVhIT21cxgtgiAsESC9/cYgIpYhY4zyTx/tof oCUcHMICMRIvvtmB1LAIKEn0T1zMDGLzCmgCrW5lB7FFBbwktuxrZ4KIC0r8mAxxK7OAvMS+ /VNZIWwdibPH1jGCzJcQOMMmcXr6MxaQ+RICLhLTL1ZCXC0s8er4FnaIsLTEpaO2EOHpjBLb f0tAtG5mlFi1ewI7RMJa4vDxi1Dz+STefe1hhejllehoE4Io8ZDYsvo1M4TtKPHm/EswW0gg VqKtbRvTBEbZWUiunoXk6llIrl7AyLyKUSy1oDg3PbXYsMBQrzgxt7g0L10vOT93EyM4tWiZ 7mCccs7nEKMAB6MSD++E0I2RQqyJZcWVuYcYJTiYlUR4GXOBQrwpiZVVqUX58UWlOanFhxil OViUxHlF11+LEBJITyxJzU5NLUgtgskycXBKNTC26PKGXO1YL8lYv6Pn4xRjv3+ez24cKpxn +eN2vGRsV7EMw9rEX6cDe5n2aa6/19qfYJijp3breTTvu0fFt8XXGzkYLD6ix6LQG8/p/vDe sp6Mi3dtJt2fG33GTulUNMuRS6t038TVW0nMenp4+zF79T+77ms/3pM14+JGz/Slx2ddOea/ r7lEiaU4I9FQi7moOBEA9ZBgwykDAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrJLMWRmVeSWpSXmKPExsVy+t9jAd34/I2RBgsu8lpsnLGe1WL+kXOs Fv2PXzNbnD+/gd1i0+NrrBaXd81hs5hxfh+TxaGpexktll6/yGTRuvcIu8XM1m8sDtwea+at YfS4fO0is8fOWXfZPTat6mTz2Lyk3qNvyypGj8+b5ALYo7hsUlJzMstSi/TtErgy1l4vLzjs UdFyZjNTA+Nxoy5GTg4JAROJlWc/snQxcnEICexklLhz8Cw7hPOVUeLVtl4mkCo2ASuJie2r GEFsEYFgidYjW1lBipgFzjNJ3JnwCiwhLBAj0XZxBpjNIqAk0T9xMTOIzSugKTGzrZUdxBYV 8JLYsq+dCSIuKPFj8j0WEJtZQF5i3/6prBC2lsT6nceZJjDyzkJSNgtJ2SwkZQsYmVcxSqYW FOem5xYbFRjmpZbrFSfmFpfmpesl5+duYgQG+LbDWn07GO8viT/EKMDBqMTDaxG8MVKINbGs uDL3EKMEB7OSCC9jLlCINyWxsiq1KD++qDQntfgQozQHi5I4b2bfjEghgfTEktTs1NSC1CKY LBMHp1QD46R7F9uOa5uq5p4K698i0Jq6qUCWmX+O15ko+x//E7kOdHZzCQqvFYjsC4ncfO9z 6Iy7y2x7D175kPrl/0SFoIdnAtOkWtyaI6YXXozdPSv668Qvm2dOZ9mgmt6g8G9JyL7575s7 SoLevetzuxuieuPNuevrWKqDTe6yJMWc819br7trtd9fNiWW4oxEQy3mouJEAHgEjy1sAgAA X-CMS-MailID: 20170907161007epcas1p316fba6e329eaabedde8a98628ebb9751 X-Msg-Generator: CA X-Sender-IP: 182.195.42.142 X-Local-Sender: =?UTF-8?B?QmFydGxvbWllaiBab2xuaWVya2lld2ljehtTUlBPTC1LZXJu?= =?UTF-8?B?ZWwgKFRQKRvsgrzshLHsoITsnpAbU2VuaW9yIFNvZnR3YXJlIEVuZ2luZWVy?= X-Global-Sender: =?UTF-8?B?QmFydGxvbWllaiBab2xuaWVya2lld2ljehtTUlBPTC1LZXJu?= =?UTF-8?B?ZWwgKFRQKRtTYW1zdW5nIEVsZWN0cm9uaWNzG1NlbmlvciBTb2Z0d2FyZSBF?= =?UTF-8?B?bmdpbmVlcg==?= X-Sender-Code: =?UTF-8?B?QzEwG0VIURtDMTBDRDAyQ0QwMjczOTI=?= CMS-TYPE: 101P X-CMS-RootMailID: 20170907161007epcas1p316fba6e329eaabedde8a98628ebb9751 X-RootMTR: 20170907161007epcas1p316fba6e329eaabedde8a98628ebb9751 References: Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Willy Wolff Odroid XU3/4 boards have thermal sensors per 4 pairs of A7+A15 cores but currently there is only one thermal-zone (including cooling maps) defined (for the first pair of cores - the first core of the A7 cluster and the first core of A15 cluster) so i.e. if the task is running on any of A15 cores but the first one, such core can reach high temperature without any proper cooling action. Fix it by adding missing thermal-zones definitions. Also while at it fix the number of steps in cpufreq cooling for cpu4 (11 steps for A15 corresponds to 700MHz, for 600MHz 12 steps should be used). Signed-off-by: Willy Wolff Cc: Rob Herring Cc: Mark Rutland Cc: Russell King Cc: Kukjin Kim [b.zolnierkie: rewrote patch subject & description + minor fixups] Signed-off-by: Bartlomiej Zolnierkiewicz --- v2: Newlines removed (1 original + 3 new ones), sorry for not catching it earlier in v1. v1: I updated the patch to address Krzysztof's review comments, the original version from June can be found here: https://patchwork.kernel.org/patch/9807333/ arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi | 239 +++++++++++++++++++-- 1 file changed, 219 insertions(+), 20 deletions(-) Index: b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi =================================================================== --- a/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi 2017-09-07 17:56:29.256414483 +0200 +++ b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi 2017-09-07 18:04:40.596426857 +0200 @@ -63,22 +63,22 @@ polling-delay-passive = <250>; polling-delay = <0>; trips { - cpu_alert0: cpu-alert-0 { + cpu0_alert0: cpu-alert-0 { temperature = <50000>; /* millicelsius */ hysteresis = <5000>; /* millicelsius */ type = "active"; }; - cpu_alert1: cpu-alert-1 { + cpu0_alert1: cpu-alert-1 { temperature = <60000>; /* millicelsius */ hysteresis = <5000>; /* millicelsius */ type = "active"; }; - cpu_alert2: cpu-alert-2 { + cpu0_alert2: cpu-alert-2 { temperature = <70000>; /* millicelsius */ hysteresis = <5000>; /* millicelsius */ type = "active"; }; - cpu_crit0: cpu-crit-0 { + cpu0_crit0: cpu-crit-0 { temperature = <120000>; /* millicelsius */ hysteresis = <0>; /* millicelsius */ type = "critical"; @@ -87,59 +87,258 @@ * Exynos542x supports only 4 trip-points * so for these polling mode is required. * Start polling at temperature level of last - * interrupt-driven trip: cpu_alert2 + * interrupt-driven trip: cpu0_alert2 */ - cpu_alert3: cpu-alert-3 { + cpu0_alert3: cpu-alert-3 { temperature = <70000>; /* millicelsius */ hysteresis = <10000>; /* millicelsius */ type = "passive"; }; - cpu_alert4: cpu-alert-4 { + cpu0_alert4: cpu-alert-4 { temperature = <85000>; /* millicelsius */ hysteresis = <10000>; /* millicelsius */ type = "passive"; }; - }; cooling-maps { map0 { - trip = <&cpu_alert0>; + trip = <&cpu0_alert0>; cooling-device = <&fan0 0 1>; }; map1 { - trip = <&cpu_alert1>; + trip = <&cpu0_alert1>; cooling-device = <&fan0 1 2>; }; map2 { - trip = <&cpu_alert2>; + trip = <&cpu0_alert2>; cooling-device = <&fan0 2 3>; }; /* - * When reaching cpu_alert3, reduce CPU + * When reaching cpu0_alert3, reduce CPU * by 2 steps. On Exynos5422/5800 that would * be: 1600 MHz and 1100 MHz. */ map3 { - trip = <&cpu_alert3>; + trip = <&cpu0_alert3>; cooling-device = <&cpu0 0 2>; }; map4 { - trip = <&cpu_alert3>; + trip = <&cpu0_alert3>; cooling-device = <&cpu4 0 2>; }; - /* - * When reaching cpu_alert4, reduce CPU - * further, down to 600 MHz (11 steps for big, + * When reaching cpu0_alert4, reduce CPU + * further, down to 600 MHz (12 steps for big, * 7 steps for LITTLE). */ map5 { - trip = <&cpu_alert4>; + trip = <&cpu0_alert4>; cooling-device = <&cpu0 3 7>; }; map6 { - trip = <&cpu_alert4>; - cooling-device = <&cpu4 3 11>; + trip = <&cpu0_alert4>; + cooling-device = <&cpu4 3 12>; + }; + }; + }; + cpu1_thermal: cpu1-thermal { + thermal-sensors = <&tmu_cpu1 0>; + polling-delay-passive = <250>; + polling-delay = <0>; + trips { + cpu1_alert0: cpu-alert-0 { + temperature = <50000>; + hysteresis = <5000>; + type = "active"; + }; + cpu1_alert1: cpu-alert-1 { + temperature = <60000>; + hysteresis = <5000>; + type = "active"; + }; + cpu1_alert2: cpu-alert-2 { + temperature = <70000>; + hysteresis = <5000>; + type = "active"; + }; + cpu1_crit0: cpu-crit-0 { + temperature = <120000>; + hysteresis = <0>; + type = "critical"; + }; + cpu1_alert3: cpu-alert-3 { + temperature = <70000>; + hysteresis = <10000>; + type = "passive"; + }; + cpu1_alert4: cpu-alert-4 { + temperature = <85000>; + hysteresis = <10000>; + type = "passive"; + }; + }; + cooling-maps { + map0 { + trip = <&cpu1_alert0>; + cooling-device = <&fan0 0 1>; + }; + map1 { + trip = <&cpu1_alert1>; + cooling-device = <&fan0 1 2>; + }; + map2 { + trip = <&cpu1_alert2>; + cooling-device = <&fan0 2 3>; + }; + map3 { + trip = <&cpu1_alert3>; + cooling-device = <&cpu0 0 2>; + }; + map4 { + trip = <&cpu1_alert3>; + cooling-device = <&cpu4 0 2>; + }; + map5 { + trip = <&cpu1_alert4>; + cooling-device = <&cpu0 3 7>; + }; + map6 { + trip = <&cpu1_alert4>; + cooling-device = <&cpu4 3 12>; + }; + }; + }; + cpu2_thermal: cpu2-thermal { + thermal-sensors = <&tmu_cpu2 0>; + polling-delay-passive = <250>; + polling-delay = <0>; + trips { + cpu2_alert0: cpu-alert-0 { + temperature = <50000>; + hysteresis = <5000>; + type = "active"; + }; + cpu2_alert1: cpu-alert-1 { + temperature = <60000>; + hysteresis = <5000>; + type = "active"; + }; + cpu2_alert2: cpu-alert-2 { + temperature = <70000>; + hysteresis = <5000>; + type = "active"; + }; + cpu2_crit0: cpu-crit-0 { + temperature = <120000>; + hysteresis = <0>; + type = "critical"; + }; + cpu2_alert3: cpu-alert-3 { + temperature = <70000>; + hysteresis = <10000>; + type = "passive"; + }; + cpu2_alert4: cpu-alert-4 { + temperature = <85000>; + hysteresis = <10000>; + type = "passive"; + }; + }; + cooling-maps { + map0 { + trip = <&cpu2_alert0>; + cooling-device = <&fan0 0 1>; + }; + map1 { + trip = <&cpu2_alert1>; + cooling-device = <&fan0 1 2>; + }; + map2 { + trip = <&cpu2_alert2>; + cooling-device = <&fan0 2 3>; + }; + map3 { + trip = <&cpu2_alert3>; + cooling-device = <&cpu0 0 2>; + }; + map4 { + trip = <&cpu2_alert3>; + cooling-device = <&cpu4 0 2>; + }; + map5 { + trip = <&cpu2_alert4>; + cooling-device = <&cpu0 3 7>; + }; + map6 { + trip = <&cpu2_alert4>; + cooling-device = <&cpu4 3 12>; + }; + }; + }; + cpu3_thermal: cpu3-thermal { + thermal-sensors = <&tmu_cpu3 0>; + polling-delay-passive = <250>; + polling-delay = <0>; + trips { + cpu3_alert0: cpu-alert-0 { + temperature = <50000>; + hysteresis = <5000>; + type = "active"; + }; + cpu3_alert1: cpu-alert-1 { + temperature = <60000>; + hysteresis = <5000>; + type = "active"; + }; + cpu3_alert2: cpu-alert-2 { + temperature = <70000>; + hysteresis = <5000>; + type = "active"; + }; + cpu3_crit0: cpu-crit-0 { + temperature = <120000>; + hysteresis = <0>; + type = "critical"; + }; + cpu3_alert3: cpu-alert-3 { + temperature = <70000>; + hysteresis = <10000>; + type = "passive"; + }; + cpu3_alert4: cpu-alert-4 { + temperature = <85000>; + hysteresis = <10000>; + type = "passive"; + }; + }; + cooling-maps { + map0 { + trip = <&cpu3_alert0>; + cooling-device = <&fan0 0 1>; + }; + map1 { + trip = <&cpu3_alert1>; + cooling-device = <&fan0 1 2>; + }; + map2 { + trip = <&cpu3_alert2>; + cooling-device = <&fan0 2 3>; + }; + map3 { + trip = <&cpu3_alert3>; + cooling-device = <&cpu0 0 2>; + }; + map4 { + trip = <&cpu3_alert3>; + cooling-device = <&cpu4 0 2>; + }; + map5 { + trip = <&cpu3_alert4>; + cooling-device = <&cpu0 3 7>; + }; + map6 { + trip = <&cpu3_alert4>; + cooling-device = <&cpu4 3 12>; }; }; };