From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752393AbcGLNpK (ORCPT ); Tue, 12 Jul 2016 09:45:10 -0400 Received: from mailout2.samsung.com ([203.254.224.25]:34632 "EHLO mailout2.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750725AbcGLNpH (ORCPT ); Tue, 12 Jul 2016 09:45:07 -0400 X-AuditID: cbfee61a-f79106d000000835-c3-5784f45f1b1d From: Bartlomiej Zolnierkiewicz To: Abhilash Kesavan Cc: Sylwester Nawrocki , Tomasz Figa , Kukjin Kim , Krzysztof =?utf-8?B?S296xYJvd3NraQ==?= , Michael Turquette , Stephen Boyd , linux-samsung-soc , linux-clk@vger.kernel.org, linux-arm-kernel , "linux-kernel@vger.kernel.org" Subject: Re: [PATCH v3 1/2] clk: samsung: cpu: Prepare for addition for Exynos7 CPU clocks Date: Tue, 12 Jul 2016 15:44:03 +0200 Message-id: <1893441.PNypKdntnt@amdc1976> User-Agent: KMail/4.13.3 (Linux/3.13.0-79-generic; KDE/4.13.3; x86_64; ; ) In-reply-to: References: <1467750561-13957-1-git-send-email-a.kesavan@samsung.com> <2318982.ZLuIVQzhgE@amdc1976> MIME-version: 1.0 Content-transfer-encoding: 7Bit Content-type: text/plain; charset=us-ascii X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFvrKLMWRmVeSWpSXmKPExsVy+t9jAd34Ly3hBjNmG1u8fmFoseavkkXv gqtsFpseX2O1+Nhzj9Xi8q45bBYzzu9jsrh4ytXi8Jt2VosfZ7pZLFbt+sPowO3x/kYru8fl vl4mj52z7rJ7bF5S79G3ZRWjx+dNcgFsUVw2Kak5mWWpRfp2CVwZHxf8Yi3YLFQx//BnpgbG Q3xdjJwcEgImEkdP32CCsMUkLtxbz9bFyMUhJLCUUeJW4yYWCOcro8Tf16tZQKrYBKwkJrav YgSxRQQMJd7vfMsOUsQs8IxZYlr3BHaQhLBAjMSm+7PAGlgEVCVmP9kEZvMKaEpM+XaVDcQW FfCS6Nn+CGgQBwenQLBE345AiGVrGCVed5xhg6gXlPgx+R5YL7OAvMS+/VNZIWwtifU7jzNN YBSYhaRsFpKyWUjKFjAyr2KUSC1ILihOSs81zEst1ytOzC0uzUvXS87P3cQIjoxnUjsYD+5y P8QowMGoxMO7oKQlXIg1say4MvcQowQHs5II79TPQCHelMTKqtSi/Pii0pzU4kOM0hwsSuK8 j/+vCxMSSE8sSc1OTS1ILYLJMnFwSjUwru5ZE64q0nZPydPAzVSkU1Lt8r7YLUa87x+uF+Jo 0wjTi11++u5JqVzOLRfbz2blH+J+981IXfvn4+4JTw0EHVcd3nt0WtqjoL/hVz8fPBZlsESe c3ro6z7e+58ET6V9eHlp062rIcW/bj1frrONc43HYYEIrV2pPkf3vJnfkOK9cWXYz2OMH5VY ijMSDbWYi4oTAYzt8buIAgAA Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Monday, July 11, 2016 04:44:30 PM Abhilash Kesavan wrote: > Hi Bartlomiej, Hi Abhilash, > Thanks for the comments. > > On Thu, Jul 7, 2016 at 1:17 PM, Bartlomiej Zolnierkiewicz > wrote: > > > > Hi > > > > On Thursday, July 07, 2016 12:45:57 PM Sylwester Nawrocki wrote: > >> On 07/05/2016 10:29 PM, Abhilash Kesavan wrote: > >> > Exynos7 has the same CPU clock registers layout as that present > > > > Please precise for which Exynos7 SoC this change is needed > > (all three of them?). > > As mentioned in my recently posted PMU series, the exynos7 is a quad > core A57 based SoC and not meant to be a SoC family. I suppose that it will get some more meaningful name once released officially (I couldn't find anything about this SoC on the net). > I have reviewed various exynos7xxx UMs in terms of the CPU CMU. Both > exynos7580 and exynos7420 have a similar CMU register layout along > with the same mux stat bits as exynos7. Exynos7870 on the other hand > is quite different. > > Please let me know what naming convention you would prefer that I use > E7/E7420/E7580 ? I would prefer using E7420 naming. > >> > in Exynos5433 except for the bits in the MUX_STAT* registers. > >> > Add a new CLK_CPU_HAS_MODIFIED_MUX_STAT flag to handle this change. > >> > >> > --- a/drivers/clk/samsung/clk-cpu.h > >> > +++ b/drivers/clk/samsung/clk-cpu.h > >> > @@ -63,6 +63,8 @@ struct exynos_cpuclk { > >> > /* The CPU clock registers have Exynos5433-compatible layout */ > >> > #define CLK_CPU_HAS_E5433_REGS_LAYOUT (1 << 2) > >> > >> > +/* Exynos5433-compatible layout with different MUX_STAT register bits */ > >> > +#define CLK_CPU_HAS_MODIFIED_MUX_STAT (1 << 3) > >> > >> It's getting a bit messy, what if there comes another SoC version > >> which has some other modification of exynos5433 registers structure? > >> We would need another variant of HAS_MODIFIED_MUX_STAT flag and we > >> could easily get lost while trying to determine which modification > >> is which. How about indicating explicitly it's an exynos7 bits > >> layout and renaming the flag to something like > >> > >> #define CLK_CPU_HAS_E7_MUX_STAT (1 << 16) ? > > > > ditto Best regards, -- Bartlomiej Zolnierkiewicz Samsung R&D Institute Poland Samsung Electronics