Re: [PATCH v2 04/12] arm64: dts: fsd: Add CSI nodes

[Krzysztof Kozlowski <krzk@kernel.org>]

On 14/08/2025 16:09, Inbaraj E wrote:
> There is a csi dma and csis interface that bundles together to allow

CSI DMA?
What is CSIS?

> csi2 capture.

CSI2?

> 
> Signed-off-by: Inbaraj E <inbaraj.e@samsung.com>
> ---
>  arch/arm64/boot/dts/tesla/fsd-evb.dts |  96 +++++
>  arch/arm64/boot/dts/tesla/fsd.dtsi    | 552 ++++++++++++++++++++++++++
>  2 files changed, 648 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/tesla/fsd-evb.dts b/arch/arm64/boot/dts/tesla/fsd-evb.dts
> index 9ff22e1c8723..dcc9a138cdb9 100644
> --- a/arch/arm64/boot/dts/tesla/fsd-evb.dts
> +++ b/arch/arm64/boot/dts/tesla/fsd-evb.dts
> @@ -130,3 +130,99 @@ &serial_0 {
>  &ufs {
>  	status = "okay";
>  };
> +
> +&mipicsis0 {
> +	status = "okay";
> +};
> +
> +&mipicsis1 {
> +	status = "okay";
> +};
> +
> +&mipicsis2 {
> +	status = "okay";
> +};
> +
> +&mipicsis3 {
> +	status = "okay";
> +};
> +
> +&mipicsis4 {
> +	status = "okay";
> +};
> +
> +&mipicsis5 {
> +	status = "okay";
> +};
> +
> +&mipicsis6 {
> +	status = "okay";
> +};
> +
> +&mipicsis7 {
> +	status = "okay";
> +};
> +
> +&mipicsis8 {
> +	status = "okay";
> +};
> +
> +&mipicsis9 {
> +	status = "okay";
> +};
> +
> +&mipicsis10 {
> +	status = "okay";
> +};
> +
> +&mipicsis11 {
> +	status = "okay";
> +};
> +
> +&csis0 {
> +	status = "okay";
> +};
> +
> +&csis1 {
> +	status = "okay";
> +};
> +
> +&csis2 {
> +	status = "okay";
> +};
> +
> +&csis3 {
> +	status = "okay";
> +};
> +
> +&csis4 {
> +	status = "okay";
> +};
> +
> +&csis5 {
> +	status = "okay";
> +};
> +
> +&csis6 {
> +	status = "okay";
> +};
> +
> +&csis7 {
> +	status = "okay";
> +};
> +
> +&csis8 {
> +	status = "okay";
> +};
> +
> +&csis9 {
> +	status = "okay";
> +};
> +
> +&csis10 {
> +	status = "okay";
> +};
> +
> +&csis11 {
> +	status = "okay";
> +};
> diff --git a/arch/arm64/boot/dts/tesla/fsd.dtsi b/arch/arm64/boot/dts/tesla/fsd.dtsi
> index a5ebb3f9b18f..a83503e9c502 100644
> --- a/arch/arm64/boot/dts/tesla/fsd.dtsi
> +++ b/arch/arm64/boot/dts/tesla/fsd.dtsi
> @@ -493,6 +493,558 @@ clock_mfc: clock-controller@12810000 {
>  			clock-names = "fin_pll";
>  		};
>  
> +		mipicsis0: mipi-csis@12640000 {

Messed ordering. See DTS coding style.

Node names should be generic. See also an explanation and list of
examples (not exhaustive) in DT specification:
https://devicetree-specification.readthedocs.io/en/latest/chapter2-devicetree-basics.html#generic-names-recommendation

What is csis?

> +			compatible = "tesla,fsd-mipi-csi2";
> +			reg = <0x0 0x12640000 0x0 0x124>;
> +			interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&clock_csi CAM_CSI0_0_IPCLKPORT_I_ACLK>,
> +				<&clock_csi CAM_CSI0_0_IPCLKPORT_I_PCLK>;
> +			clock-names = "aclk", "pclk";
> +			samsung,syscon-csis = <&sysreg_cam 0x40c>;
> +			status = "disabled";
> +
> +			ports {
> +				#address-cells = <1>;
> +				#size-cells = <0>;
> +
> +				port@0 {
> +					reg = <0>;
> +				};
> +
> +				port@1 {
> +					reg = <1>;
> +
> +					mipi_csis_0_out: endpoint {
> +						remote-endpoint = <&csis_in_0>;
> +					};
> +				};
> +			};
> +		};
> +
> +		csis0: csis@12641000 {
> +			compatible = "tesla,fsd-csis-media";
> +			reg = <0x0 0x12641000 0x0 0x44c>;
> +			interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&clock_csi CAM_CSI0_0_IPCLKPORT_I_ACLK>,
> +				<&clock_csi CAM_CSI0_0_IPCLKPORT_I_PCLK>,
> +				<&clock_csi CAM_CSI_PLL>;
> +			clock-names = "aclk", "pclk", "pll";
> +			iommus = <&smmu_isp 0x0 0x0>;
> +			status = "disabled";
> +
> +			port {
> +				csis_in_0: endpoint {
> +					remote-endpoint = <&mipi_csis_0_out>;
> +				};
> +			};
> +		};
> +
> +		mipicsis1: mipi-csis@12650000 {
> +			compatible = "tesla,fsd-mipi-csi2";
> +			reg = <0x0 0x12650000 0x0 0x124>;
> +			interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&clock_csi CAM_CSI0_1_IPCLKPORT_I_ACLK>,
> +				<&clock_csi CAM_CSI0_1_IPCLKPORT_I_PCLK>;
> +			clock-names = "aclk", "pclk";
> +			samsung,syscon-csis = <&sysreg_cam 0x40c>;
> +			status = "disabled";
> +
> +			ports {
> +				#address-cells = <1>;
> +				#size-cells = <0>;
> +
> +				port@0 {
> +					reg = <0>;
> +				};
> +
> +				port@1 {
> +					reg = <1>;
> +
> +					mipi_csis_1_out: endpoint {
> +						remote-endpoint = <&csis_in_1>;
> +					};
> +				};
> +			};
> +		};
> +
> +		csis1: csis@12651000 {
> +			compatible = "tesla,fsd-csis-media";
> +			reg = <0x0 0x12651000 0x0 0x44c>;
> +			interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&clock_csi CAM_CSI0_1_IPCLKPORT_I_ACLK>,
> +				<&clock_csi CAM_CSI0_1_IPCLKPORT_I_PCLK>,
> +				<&clock_csi CAM_CSI_PLL>;
> +			clock-names = "aclk", "pclk", "pll";
> +			iommus = <&smmu_isp 0x0 0x0>;
> +			status = "disabled";
> +
> +			port {
> +				csis_in_1: endpoint {
> +					remote-endpoint = <&mipi_csis_1_out>;
> +				};
> +			};
> +		};
> +
> +		mipicsis2: mipi-csis@12660000 {
> +			compatible = "tesla,fsd-mipi-csi2";
> +			reg = <0x0 0x12660000 0x0 0x124>;
> +			interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&clock_csi CAM_CSI0_2_IPCLKPORT_I_ACLK>,
> +				<&clock_csi CAM_CSI0_2_IPCLKPORT_I_PCLK>;
> +			clock-names = "aclk", "pclk";
> +			samsung,syscon-csis = <&sysreg_cam 0x40c>;
> +			status = "disabled";
> +
> +			ports {
> +				#address-cells = <1>;
> +				#size-cells = <0>;
> +
> +				port@0 {
> +					reg = <0>;
> +				};
> +
> +				port@1 {
> +					reg = <1>;
> +
> +					mipi_csis_2_out: endpoint {
> +						remote-endpoint = <&csis_in_2>;
> +					};
> +				};
> +			};
> +		};
> +
> +		csis2: csis@12661000 {


What is CSIS? Seems like copy paste from other Samsung code, but isn't
this just CSI?

What is the meaning of this CSIS acronym?


Best regards,
Krzysztof