Re: [PATCH 04/20] arm64: dts: qcom: kaanapali: Add support for PCIe0 on Kaanapali

Dmitry Baryshkov
2025-10-07T01:24:14Z

On Mon, Oct 06, 2025 at 11:23:23PM +0900, Krzysztof Kozlowski wrote:
> On 25/09/2025 09:17, Jingyi Wang wrote:
> > From: Qiang Yu <qiang.yu@oss.qualcomm.com>
> >
> > Describe PCIe0 controller and PHY. Also add required system resources like
> > regulators, clocks, interrupts and registers configuration for PCIe0.
> >
> > Signed-off-by: Qiang Yu <qiang.yu@oss.qualcomm.com>
> > Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com>
> > ---
> > arch/arm64/boot/dts/qcom/kaanapali.dtsi | 182 +++++++++++++++++++++++++++++++-
> > 1 file changed, 181 insertions(+), 1 deletion(-)
> >
> > diff --git a/arch/arm64/boot/dts/qcom/kaanapali.dtsi b/arch/arm64/boot/dts/qcom/kaanapali.dtsi
> > index b385b4642883..07dc112065d1 100644
> > --- a/arch/arm64/boot/dts/qcom/kaanapali.dtsi
> > +++ b/arch/arm64/boot/dts/qcom/kaanapali.dtsi
> > @@ -452,7 +452,7 @@ gcc: clock-controller@100000 {
> > clocks = <&bi_tcxo_div2>,
> > <0>,
> > <&sleep_clk>,
> > - <0>,
>
>
> Why are you removing lines which you just added? What sort of buggy
> patch was before?

Weirdly enough, it's correct: this patch adds clock provider, which gets
used by the GCC. You might argue about the split, but there is no bug
here.

>
> > + <&pcie0_phy>,
> > <0>,
> > <0>,
> > <0>,
>
>
> Best regards,
> Krzysztof

--
With best wishes
Dmitry