From: "Andersen, John S" <john.s.andersen@intel.com>
To: "luto@kernel.org" <luto@kernel.org>
Cc: "jmattson@google.com" <jmattson@google.com>,
"joro@8bytes.org" <joro@8bytes.org>,
"bp@alien8.de" <bp@alien8.de>, "x86@kernel.org" <x86@kernel.org>,
"vkuznets@redhat.com" <vkuznets@redhat.com>,
"hpa@zytor.com" <hpa@zytor.com>,
"mingo@redhat.com" <mingo@redhat.com>,
"tglx@linutronix.de" <tglx@linutronix.de>,
"kvm@vger.kernel.org" <kvm@vger.kernel.org>,
"pbonzini@redhat.com" <pbonzini@redhat.com>,
"Christopherson, Sean J" <sean.j.christopherson@intel.com>,
"wanpengli@tencent.com" <wanpengli@tencent.com>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [RESEND RFC 2/2] X86: Use KVM CR pin MSRs
Date: Tue, 24 Dec 2019 21:18:27 +0000 [thread overview]
Message-ID: <19f3a3f98d259accf67a6c22c112bfa8f11513d4.camel@intel.com> (raw)
In-Reply-To: <CALCETrV1nOpc3mqyXTXOzw-8Aa3zFpGi1cY7oc_2pz2-JVyH8Q@mail.gmail.com>
On Sun, 2019-12-22 at 23:39 -0800, Andy Lutomirski wrote:
> On Fri, Dec 20, 2019 at 11:27 AM John Andersen
> <john.s.andersen@intel.com> wrote:
> > Strengthen existing control register pinning when running
> > paravirtualized under KVM. Check which bits KVM supports pinning
> > for
> > each control register and only pin supported bits which are already
> > pinned via the existing native protection. Write to KVM CR0 and CR4
> > pinned MSRs to enable pinning.
> >
> > Initiate KVM assisted pinning directly following the setup of
> > native
> > pinning on boot CPU. For non-boot CPUs initiate paravirtualized
> > pinning
> > on CPU identification.
> >
> > Identification of non-boot CPUs takes place after the boot CPU has
> > setup
> > native CR pinning. Therefore, non-boot CPUs access pinned bits
> > setup by
> > the boot CPU and request that those be pinned. All CPUs request
> > paravirtualized pinning of the same bits which are already pinned
> > natively.
> >
> > Guests using the kexec system call currently do not support
> > paravirtualized control register pinning. This is due to early boot
> > code writing known good values to control registers, these values
> > do
> > not contain the protected bits. This is due to CPU feature
> > identification being done at a later time, when the kernel properly
> > checks if it can enable protections.
>
> Is hibernation supported? How about suspend-to-RAM?
>
Something is writing to CR4 during resume which is breaking
hibernation. Unfortunately I hadn't been able to get my hibernation
test working before sending this out. I will investigate.
> FWIW, I think that handling these details through Kconfig is the
> wrong
> choice. Distribution kernels should enable this, and they're not
> going to turn off kexec. Arguably kexec should be made to work --
> there is no fundamental reason that kexec should need to fiddle with
> CR0.WP, for example. But a boot option could also work as a
> short-term option.
Given the situation with hibernation. I think I'll implement the kexec
discovery Liran suggested, and then investigate the hibernate situation
further.
Thanks,
John
next prev parent reply other threads:[~2019-12-24 21:18 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-12-20 19:26 [RESEND RFC 0/2] Paravirtualized Control Register pinning John Andersen
2019-12-20 19:27 ` [RESEND RFC 1/2] KVM: X86: Add CR pin MSRs John Andersen
2019-12-20 19:27 ` [RESEND RFC 2/2] X86: Use KVM " John Andersen
2019-12-23 7:39 ` Andy Lutomirski
2019-12-23 12:06 ` Borislav Petkov
2019-12-24 21:18 ` Andersen, John S [this message]
2019-12-21 13:59 ` [RESEND RFC 0/2] Paravirtualized Control Register pinning Paolo Bonzini
2019-12-23 17:28 ` Andersen, John S
2019-12-23 14:30 ` Liran Alon
2019-12-24 22:56 ` Liran Alon
2019-12-25 2:04 ` Andy Lutomirski
2019-12-25 13:05 ` Liran Alon
2019-12-23 14:48 ` Liran Alon
2019-12-23 17:09 ` Paolo Bonzini
2019-12-23 17:27 ` Andersen, John S
2019-12-23 17:28 ` Liran Alon
2019-12-23 17:46 ` Paolo Bonzini
2019-12-23 22:49 ` Liran Alon
2019-12-24 19:44 ` Andersen, John S
2019-12-24 20:35 ` Liran Alon
2019-12-24 21:17 ` Andersen, John S
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