From: Baolu Lu <baolu.lu@linux.intel.com>
To: Jacob Pan <jacob.jun.pan@linux.intel.com>
Cc: baolu.lu@linux.intel.com, Joerg Roedel <joro@8bytes.org>,
Will Deacon <will@kernel.org>,
Robin Murphy <robin.murphy@arm.com>,
Jason Gunthorpe <jgg@ziepe.ca>, Kevin Tian <kevin.tian@intel.com>,
iommu@lists.linux.dev, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v3 1/2] iommu/vt-d: Add helper to flush caches for context change
Date: Wed, 3 Jul 2024 10:49:19 +0800 [thread overview]
Message-ID: <1a2f66a2-a867-4203-8a76-dbced80bfeff@linux.intel.com> (raw)
In-Reply-To: <20240702085749.2e2bbea5@jacob-builder>
On 7/2/24 11:57 PM, Jacob Pan wrote:
> On Tue, 2 Jul 2024 12:43:41 +0800, Baolu Lu<baolu.lu@linux.intel.com>
> wrote:
>
>> On 2024/7/2 12:41, Jacob Pan wrote:
>>> On Mon, 1 Jul 2024 19:23:16 +0800, Lu Baolu<baolu.lu@linux.intel.com>
>>> wrote:
>>>
>>>> + if (flush_domains) {
>>>> + /*
>>>> + * If the IOMMU is running in scalable mode and there
>>>> might
>>>> + * be potential PASID translations, the caller should
>>>> hold
>>>> + * the lock to ensure that context changes and cache
>>>> flushes
>>>> + * are atomic.
>>>> + */
>>>> + assert_spin_locked(&iommu->lock);
>>>> + for (i = 0; i < info->pasid_table->max_pasid; i++) {
>>>> + pte = intel_pasid_get_entry(info->dev, i);
>>>> + if (!pte || !pasid_pte_is_present(pte))
>>>> + continue;
>>> Is it worth going through 1M PASIDs just to skip the PASID cache
>>> invalidation? Or just do the flush on all used DIDs unconditionally.
>> Currently we don't track all domains attached to a device. If such
>> optimization is necessary, perhaps we can add it later.
> I think it is necessary, because without tracking domain IDs, the code
> above would have duplicated invalidations.
> For example: a device PASID table has the following entries
> PASID DomainID
> -------------------------
> 100 1
> 200 1
> 300 2
> -------------------------
> When a present context entry changes, we need to do:
> qi_flush_pasid_cache(iommu, 1, QI_PC_ALL_PASIDS, 0);
> qi_flush_pasid_cache(iommu, 2, QI_PC_ALL_PASIDS, 0);
>
> With this code, we do
> qi_flush_pasid_cache(iommu, 1, QI_PC_ALL_PASIDS, 0);
> qi_flush_pasid_cache(iommu, 1, QI_PC_ALL_PASIDS, 0);//duplicated!
> qi_flush_pasid_cache(iommu, 2, QI_PC_ALL_PASIDS, 0);
Yes, this is likely. But currently enabling and disabling PRI happens in
driver's probe and release paths. Therefore such duplicate is not so
critical.
For long term, I have a plan to abstract the domain id into an object so
that domains attached to different PASIDs of a device could share a
domain id. With that done, we could improve this code by iterating the
domain id objects for a device and performing cache invalidation
directly.
Thanks,
baolu
next prev parent reply other threads:[~2024-07-03 2:52 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-07-01 11:23 [PATCH v3 0/2] iommu/vt-d: Refactor PRI enable/disable steps Lu Baolu
2024-07-01 11:23 ` [PATCH v3 1/2] iommu/vt-d: Add helper to flush caches for context change Lu Baolu
2024-07-02 1:11 ` Tian, Kevin
2024-07-02 1:47 ` Baolu Lu
2024-07-02 2:43 ` Baolu Lu
2024-07-02 4:51 ` Baolu Lu
2024-07-02 6:25 ` Yi Liu
2024-07-02 6:39 ` Tian, Kevin
2024-07-02 8:03 ` Baolu Lu
2024-07-02 4:41 ` Jacob Pan
2024-07-02 4:43 ` Baolu Lu
2024-07-02 15:57 ` Jacob Pan
2024-07-03 2:49 ` Baolu Lu [this message]
2024-07-03 21:35 ` Jacob Pan
2024-07-01 11:23 ` [PATCH v3 2/2] iommu/vt-d: Refactor PCI PRI enabling/disabling callbacks Lu Baolu
2024-07-02 1:11 ` Tian, Kevin
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