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[103.229.16.4]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-39668a5832bsm3060969a91.15.2026.08.26.00.48.23 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 26 Aug 2026 00:48:27 -0700 (PDT) Message-ID: <1b671346-cfa3-4cd7-ba05-56fceb021d3e@oss.qualcomm.com> Date: Wed, 26 Aug 2026 15:48:22 +0800 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH RESEND v5 05/25] drm/msm/dp: add support to send ACT packets for MST To: Dmitry Baryshkov Cc: Rob Clark , Dmitry Baryshkov , Abhinav Kumar , Sean Paul , Marijn Suijten , David Airlie , Simona Vetter , Jessica Zhang , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org, Abhinav Kumar References: <20260629-msm-dp-mst-v5-0-2ed6aee1867a@oss.qualcomm.com> <20260629-msm-dp-mst-v5-5-2ed6aee1867a@oss.qualcomm.com> Content-Language: en-US From: Yongxing Mou In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Proofpoint-GUID: maTKxFWGXiIUIvZLbqFBCAFqUbU187h8 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwODI2MDA2MyBTYWx0ZWRfX7H/rqelC5oyv GHO739G8AYrdYNOz2cEGWgHxiRmSVcdiulL/i7cA9RMZovdRzjKiGhaps3QsxVCslLG6GqWwKhz 8mjULQiD5qqaHNVSa3gC2xNEMArhWJa8Ftmm7SG8DCx7f+deUGtjF0vQLHOjQMcqLlNEqdORBuW pgN8f9MTD4FFH8MKs2VCY4UhWdrk2UvWhlbf2l9N76H+gmDk8hhSuRMaX9DedqAAedMZMkaLScQ mIVelLRJ9ynAg1DsadMlUHADMBUEyD/11RtlDk3VjxzuUzEE+MjHkw4qoLu8x1nOq2rIrjNj/hM t3+LpEErZJ1slJZHufMBwhPHciuNOFvmOFCn1+7SKgpX0Erl4e65HRt96etZkzPwpR5Ko/BSTBK CgSzxm4Io30GVvPrdbpIUmVJFIlmcpXMkoXwQSh5QlRnB80znsOJLQB3mJ+T5YjGQg1P9JaZSmn NXtJiRPvAxJuZnBQNBA== X-Authority-Analysis: v=2.4 cv=Y77IdBeN c=1 sm=1 tr=0 ts=6a8e9a4d cx=c_pps a=cmESyDAEBpBGqyK7t0alAg==:117 a=nuhDOHQX5FNHPW3J6Bj6AA==:17 a=IkcTkHD0fZMA:10 a=Sv0fKeRqtYgA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=eoimf2acIAo5FJnRuUoq:22 a=COk6AnOGAAAA:8 a=EUspDBNiAAAA:8 a=2-Wp6Lh4Fygn7rjj7MsA:9 a=QEXdDO2ut3YA:10 a=1OuFwYUASf3TG4hYMiVC:22 a=TjNXssC_j7lpFel5tvFf:22 X-Proofpoint-ORIG-GUID: maTKxFWGXiIUIvZLbqFBCAFqUbU187h8 X-Proofpoint-Spam-Info: AW1haW4tMjYwODI2MDA2MyBTYWx0ZWRfX69LSf1Qfswzy +A13kMErc6wgTzKzOJsA93kNnf4oPVcZcAcvMKAyXzvAdMm6QLK807VWZI92+lrK8Fju6dwsZmP e9wG34gwi9DPXlKEDCsC30D6AQGuF98= X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-08-26_02,2026-08-24_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 suspectscore=0 bulkscore=0 priorityscore=1501 clxscore=1015 phishscore=0 spamscore=0 malwarescore=0 adultscore=0 lowpriorityscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2608260063 On 7/12/2026 9:56 PM, Dmitry Baryshkov wrote: > On Mon, Jun 29, 2026 at 10:14:26PM +0800, Yongxing Mou wrote: >> From: Abhinav Kumar >> >> Whenever virtual channel slot allocation changes, the DP >> source must send the action control trigger sequence to notify >> the sink about the same. This would be applicable during the >> start and stop of the pixel stream. Add the infrastructure >> to be able to send ACT packets for the DP controller when >> operating in MST mode. >> >> Signed-off-by: Abhinav Kumar >> Signed-off-by: Yongxing Mou >> --- >> drivers/gpu/drm/msm/dp/dp_ctrl.c | 44 ++++++++++++++++++++++++++++++++++++- >> drivers/gpu/drm/msm/dp/dp_ctrl.h | 5 ++++- >> drivers/gpu/drm/msm/dp/dp_display.c | 3 ++- >> drivers/gpu/drm/msm/dp/dp_display.h | 1 + >> drivers/gpu/drm/msm/dp/dp_reg.h | 2 ++ >> 5 files changed, 52 insertions(+), 3 deletions(-) >> >> @@ -2623,6 +2656,8 @@ int msm_dp_ctrl_on_stream(struct msm_dp_ctrl *msm_dp_ctrl, struct msm_dp_panel * >> >> ctrl = container_of(msm_dp_ctrl, struct msm_dp_ctrl_private, msm_dp_ctrl); >> >> + ctrl->mst_active = mst_active; >> + >> pixel_rate_orig = panel->msm_dp_mode.drm_mode.clock; >> pixel_rate = pixel_rate_orig; >> >> @@ -2658,6 +2693,10 @@ int msm_dp_ctrl_on_stream(struct msm_dp_ctrl *msm_dp_ctrl, struct msm_dp_panel * >> >> msm_dp_write_link(ctrl, REG_DP_STATE_CTRL, DP_STATE_CTRL_SEND_VIDEO); >> >> + ret = msm_dp_ctrl_mst_send_act(msm_dp_ctrl, panel); >> + if (ret) >> + return ret; > > Should not we mark mst_active only here? > I'd prefer not to change it here. The flag is needed later in the flow, and I'd rather avoid passing it through multiple layers of function arguments.. If MST initialization actually fails, I think it's cleaner to handle the cleanup through the error path based on the return value. >> + >> ret = msm_dp_ctrl_wait4video_ready(ctrl); >> if (ret) >> return ret; >> diff --git a/drivers/gpu/drm/msm/dp/dp_reg.h b/drivers/gpu/drm/msm/dp/dp_reg.h >> index 310e5a1cc934..6808965878d4 100644 >> --- a/drivers/gpu/drm/msm/dp/dp_reg.h >> +++ b/drivers/gpu/drm/msm/dp/dp_reg.h >> @@ -156,6 +156,8 @@ >> #define DP_CONFIGURATION_CTRL_BPC_SHIFT (0x08) >> #define DP_CONFIGURATION_CTRL_LSCLK_DIV_SHIFT (0x0D) >> >> +#define REG_DP_MST_ACT (0x00000500) > > It's not that it is a register in its own register space. > Got it. will move this. >> + >> #define REG_DP_SOFTWARE_MVID (0x00000010) >> #define REG_DP_SOFTWARE_NVID (0x00000018) >> #define REG_DP_TOTAL_HOR_VER (0x0000001C) >> >> -- >> 2.43.0 >> >