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In-Reply-To: <20230323025229.2971-2-zhuyinbo@loongson.cn>
References: <20230323025229.2971-1-zhuyinbo@loongson.cn> <20230323025229.2971-2-zhuyinbo@loongson.cn>
Subject: Re: [PATCH v16 2/2] clk: clk-loongson2: add clock controller driver support
From:   Stephen Boyd <sboyd@kernel.org>
Cc:     Jianmin Lv <lvjianmin@loongson.cn>, wanghongliang@loongson.cn,
        Liu Peibao <liupeibao@loongson.cn>,
        loongson-kernel@lists.loongnix.cn, Yinbo Zhu <zhuyinbo@loongson.cn>
To:     Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
        Michael Turquette <mturquette@baylibre.com>,
        Rob Herring <robh+dt@kernel.org>,
        Yinbo Zhu <zhuyinbo@loongson.cn>, devicetree@vger.kernel.org,
        linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org
Date:   Mon, 27 Mar 2023 12:22:52 -0700
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Quoting Yinbo Zhu (2023-03-22 19:52:29)
> This driver provides support for clock controller on Loongson-2 SoC,
> the Loongson-2 SoC uses a 100MHz clock as the PLL reference clock,
> there are five independent PLLs inside, each of which PLL can
> provide up to three sets of frequency dependent clock outputs.
>=20
> Signed-off-by: Yinbo Zhu <zhuyinbo@loongson.cn>
> ---

Applied to clk-next