Re: [PATCH v5 04/23] irqchip/gic-v4.1: Wait for completion of redistributor's INVALL operation

Auger Eric
2020-03-20T14:24:08Z

Hi,

On 3/4/20 9:33 PM, Marc Zyngier wrote:
> From: Zenghui Yu <yuzenghui@huawei.com>
>
> In GICv4.1, we emulate a guest-issued INVALL command by a direct write
> to GICR_INVALLR. Before we finish the emulation and go back to guest,
> let's make sure the physical invalidate operation is actually completed
> and no stale data will be left in redistributor. Per the specification,
> this can be achieved by polling the GICR_SYNCR.Busy bit (to zero).
>
> Signed-off-by: Zenghui Yu <yuzenghui@huawei.com>
> Signed-off-by: Marc Zyngier <maz@kernel.org>
> Link: https://lore.kernel.org/r/20200302092145.899-1-yuzenghui@huawei.com
Reviewed-by: Eric Auger <eric.auger@redhat.com>

Thanks

Eric
> ---
> drivers/irqchip/irq-gic-v3-its.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c
> index 1af713990123..c84370245bea 100644
> --- a/drivers/irqchip/irq-gic-v3-its.c
> +++ b/drivers/irqchip/irq-gic-v3-its.c
> @@ -3827,6 +3827,8 @@ static void its_vpe_4_1_invall(struct its_vpe *vpe)
> /* Target the redistributor this vPE is currently known on */
> rdbase = per_cpu_ptr(gic_rdists->rdist, vpe->col_idx)->rd_base;
> gic_write_lpir(val, rdbase + GICR_INVALLR);
> +
> + wait_for_syncr(rdbase);
> }
>
> static int its_vpe_4_1_set_vcpu_affinity(struct irq_data *d, void *vcpu_info)
>