Re: [PATCH net v2 1/1] net: dsa: microchip: lan937x: Fix RGMII delay tuning

[Paolo Abeni <pabeni@redhat.com>]

On 11/14/25 10:09 AM, Oleksij Rempel wrote:
> Correct RGMII delay application logic in lan937x_set_tune_adj().
> 
> The function was missing `data16 &= ~PORT_TUNE_ADJ` before setting the
> new delay value. This caused the new value to be bitwise-OR'd with the
> existing PORT_TUNE_ADJ field instead of replacing it.
> 
> For example, when setting the RGMII 2 TX delay on port 4, the
> intended TUNE_ADJUST value of 0 (RGMII_2_TX_DELAY_2NS) was
> incorrectly OR'd with the default 0x1B (from register value 0xDA3),
> leaving the delay at the wrong setting.
> 
> This patch adds the missing mask to clear the field, ensuring the
> correct delay value is written. Physical measurements on the RGMII TX
> lines confirm the fix, showing the delay changing from ~1ns (before
> change) to ~2ns.
> 
> While testing on i.MX 8MP showed this was within the platform's timing
> tolerance, it did not match the intended hardware-characterized value.
> 
> Fixes: b19ac41faa3f ("net: dsa: microchip: apply rgmii tx and rx delay in phylink mac config")
> Cc: stable@vger.kernel.org
> Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>

Lacking the changelog and reference to the previous submission, it took
me a little to notice that the only difference is the added Cc: tag.

Please:
- ask explicitly before going ahead with such repost, as manual tag
propagation is sometimes preferable
- always include a suitable changelog and reference to prior revisions

Thanks,

Paolo