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* [PATCH net v2 1/1] net: dsa: microchip: lan937x: Fix RGMII delay tuning
@ 2025-11-14  9:09 Oleksij Rempel
  2025-11-18 14:14 ` Paolo Abeni
  2025-11-20 10:30 ` patchwork-bot+netdevbpf
  0 siblings, 2 replies; 3+ messages in thread
From: Oleksij Rempel @ 2025-11-14  9:09 UTC (permalink / raw)
  To: David S. Miller, Andrew Lunn, Eric Dumazet, Florian Fainelli,
	Jakub Kicinski, Paolo Abeni, Vladimir Oltean, Woojung Huh,
	Arun Ramadoss
  Cc: Oleksij Rempel, stable, kernel, linux-kernel, netdev,
	UNGLinuxDriver

Correct RGMII delay application logic in lan937x_set_tune_adj().

The function was missing `data16 &= ~PORT_TUNE_ADJ` before setting the
new delay value. This caused the new value to be bitwise-OR'd with the
existing PORT_TUNE_ADJ field instead of replacing it.

For example, when setting the RGMII 2 TX delay on port 4, the
intended TUNE_ADJUST value of 0 (RGMII_2_TX_DELAY_2NS) was
incorrectly OR'd with the default 0x1B (from register value 0xDA3),
leaving the delay at the wrong setting.

This patch adds the missing mask to clear the field, ensuring the
correct delay value is written. Physical measurements on the RGMII TX
lines confirm the fix, showing the delay changing from ~1ns (before
change) to ~2ns.

While testing on i.MX 8MP showed this was within the platform's timing
tolerance, it did not match the intended hardware-characterized value.

Fixes: b19ac41faa3f ("net: dsa: microchip: apply rgmii tx and rx delay in phylink mac config")
Cc: stable@vger.kernel.org
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
---
 drivers/net/dsa/microchip/lan937x_main.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/net/dsa/microchip/lan937x_main.c b/drivers/net/dsa/microchip/lan937x_main.c
index b1ae3b9de3d1..5a1496fff445 100644
--- a/drivers/net/dsa/microchip/lan937x_main.c
+++ b/drivers/net/dsa/microchip/lan937x_main.c
@@ -540,6 +540,7 @@ static void lan937x_set_tune_adj(struct ksz_device *dev, int port,
 	ksz_pread16(dev, port, reg, &data16);
 
 	/* Update tune Adjust */
+	data16 &= ~PORT_TUNE_ADJ;
 	data16 |= FIELD_PREP(PORT_TUNE_ADJ, val);
 	ksz_pwrite16(dev, port, reg, data16);
 
-- 
2.47.3


^ permalink raw reply related	[flat|nested] 3+ messages in thread

* Re: [PATCH net v2 1/1] net: dsa: microchip: lan937x: Fix RGMII delay tuning
  2025-11-14  9:09 [PATCH net v2 1/1] net: dsa: microchip: lan937x: Fix RGMII delay tuning Oleksij Rempel
@ 2025-11-18 14:14 ` Paolo Abeni
  2025-11-20 10:30 ` patchwork-bot+netdevbpf
  1 sibling, 0 replies; 3+ messages in thread
From: Paolo Abeni @ 2025-11-18 14:14 UTC (permalink / raw)
  To: Oleksij Rempel, David S. Miller, Andrew Lunn, Eric Dumazet,
	Florian Fainelli, Jakub Kicinski, Vladimir Oltean, Woojung Huh,
	Arun Ramadoss
  Cc: stable, kernel, linux-kernel, netdev, UNGLinuxDriver

On 11/14/25 10:09 AM, Oleksij Rempel wrote:
> Correct RGMII delay application logic in lan937x_set_tune_adj().
> 
> The function was missing `data16 &= ~PORT_TUNE_ADJ` before setting the
> new delay value. This caused the new value to be bitwise-OR'd with the
> existing PORT_TUNE_ADJ field instead of replacing it.
> 
> For example, when setting the RGMII 2 TX delay on port 4, the
> intended TUNE_ADJUST value of 0 (RGMII_2_TX_DELAY_2NS) was
> incorrectly OR'd with the default 0x1B (from register value 0xDA3),
> leaving the delay at the wrong setting.
> 
> This patch adds the missing mask to clear the field, ensuring the
> correct delay value is written. Physical measurements on the RGMII TX
> lines confirm the fix, showing the delay changing from ~1ns (before
> change) to ~2ns.
> 
> While testing on i.MX 8MP showed this was within the platform's timing
> tolerance, it did not match the intended hardware-characterized value.
> 
> Fixes: b19ac41faa3f ("net: dsa: microchip: apply rgmii tx and rx delay in phylink mac config")
> Cc: stable@vger.kernel.org
> Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>

Lacking the changelog and reference to the previous submission, it took
me a little to notice that the only difference is the added Cc: tag.

Please:
- ask explicitly before going ahead with such repost, as manual tag
propagation is sometimes preferable
- always include a suitable changelog and reference to prior revisions

Thanks,

Paolo


^ permalink raw reply	[flat|nested] 3+ messages in thread

* Re: [PATCH net v2 1/1] net: dsa: microchip: lan937x: Fix RGMII delay tuning
  2025-11-14  9:09 [PATCH net v2 1/1] net: dsa: microchip: lan937x: Fix RGMII delay tuning Oleksij Rempel
  2025-11-18 14:14 ` Paolo Abeni
@ 2025-11-20 10:30 ` patchwork-bot+netdevbpf
  1 sibling, 0 replies; 3+ messages in thread
From: patchwork-bot+netdevbpf @ 2025-11-20 10:30 UTC (permalink / raw)
  To: Oleksij Rempel
  Cc: davem, andrew, edumazet, f.fainelli, kuba, pabeni, olteanv,
	woojung.huh, arun.ramadoss, stable, kernel, linux-kernel, netdev,
	UNGLinuxDriver

Hello:

This patch was applied to netdev/net.git (main)
by Paolo Abeni <pabeni@redhat.com>:

On Fri, 14 Nov 2025 10:09:51 +0100 you wrote:
> Correct RGMII delay application logic in lan937x_set_tune_adj().
> 
> The function was missing `data16 &= ~PORT_TUNE_ADJ` before setting the
> new delay value. This caused the new value to be bitwise-OR'd with the
> existing PORT_TUNE_ADJ field instead of replacing it.
> 
> For example, when setting the RGMII 2 TX delay on port 4, the
> intended TUNE_ADJUST value of 0 (RGMII_2_TX_DELAY_2NS) was
> incorrectly OR'd with the default 0x1B (from register value 0xDA3),
> leaving the delay at the wrong setting.
> 
> [...]

Here is the summary with links:
  - [net,v2,1/1] net: dsa: microchip: lan937x: Fix RGMII delay tuning
    https://git.kernel.org/netdev/net/c/3ceb6ac2116e

You are awesome, thank you!
-- 
Deet-doot-dot, I am a bot.
https://korg.docs.kernel.org/patchwork/pwbot.html



^ permalink raw reply	[flat|nested] 3+ messages in thread

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2025-11-14  9:09 [PATCH net v2 1/1] net: dsa: microchip: lan937x: Fix RGMII delay tuning Oleksij Rempel
2025-11-18 14:14 ` Paolo Abeni
2025-11-20 10:30 ` patchwork-bot+netdevbpf

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