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Fri, 21 Aug 2026 12:21:40 -0700 (PDT) Message-ID: <1d328d5bdc0750910aa2303cefb0848fb9d270c0.camel@redhat.com> Subject: Re: [PATCH v2 01/10] drm/nouveau/disp: move GSP head-timing ISR and vblank helpers to tu102.c From: lyude@redhat.com To: Mohamed Ahmed , linux-kernel@vger.kernel.org Cc: dri-devel@lists.freedesktop.org, Danilo Krummrich , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Mary Guillemard , nouveau@lists.freedesktop.org Date: Fri, 21 Aug 2026 15:21:40 -0400 In-Reply-To: <20260820164929.17117-2-mohamedahmedegypt2001@gmail.com> References: <20260820164929.17117-1-mohamedahmedegypt2001@gmail.com> <20260820164929.17117-2-mohamedahmedegypt2001@gmail.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable User-Agent: Evolution 3.58.3 (3.58.3-1.fc43) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Reviewed-by: Lyude Paul On Thu, 2026-08-20 at 20:49 +0400, Mohamed Ahmed wrote: > The GSP-RM display code in rm/r535/disp.c owns a handful of direct > MMIO > routines: the head-timing (vblank) interrupt handler and the per-head > vblank enable/disable. They program display registers, not RM, so > they > belong with the rest of the per-chip register code in engine/disp/. >=20 > Move them to tu102.c (Turing is the first GSP-capable generation) as > tu102_disp_intr() and tu102_head_vblank_get()/put(), exported for > rm/r535/disp.c, which keeps calling them by name for now. No > functional > change. >=20 > Signed-off-by: Mohamed Ahmed > --- > =C2=A0.../gpu/drm/nouveau/nvkm/engine/disp/head.h=C2=A0=C2=A0 |=C2=A0 3 += + > =C2=A0.../gpu/drm/nouveau/nvkm/engine/disp/priv.h=C2=A0=C2=A0 |=C2=A0 1 + > =C2=A0.../gpu/drm/nouveau/nvkm/engine/disp/tu102.c=C2=A0 | 50 > ++++++++++++++++++ > =C2=A0.../nouveau/nvkm/subdev/gsp/rm/r535/disp.c=C2=A0=C2=A0=C2=A0 | 52 += +--------------- > -- > =C2=A04 files changed, 57 insertions(+), 49 deletions(-) >=20 > diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/head.h > b/drivers/gpu/drm/nouveau/nvkm/engine/disp/head.h > index b642729c254f..986043e87554 100644 > --- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/head.h > +++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/head.h > @@ -56,6 +56,9 @@ int gv100_head_new(struct nvkm_disp *, int id); > =C2=A0void gv100_head_state(struct nvkm_head *head, struct nvkm_head_stat= e > *state); > =C2=A0void gv100_head_rgpos(struct nvkm_head *head, u16 *hline, u16 > *vline); > =C2=A0 > +void tu102_head_vblank_get(struct nvkm_head *); > +void tu102_head_vblank_put(struct nvkm_head *); > + > =C2=A0#define HEAD_MSG(h,l,f,a...) do > {=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 \ > =C2=A0 struct nvkm_head *_h =3D > (h);=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 \ > =C2=A0 nvkm_##l(&_h->disp->engine.subdev, "head-%d: "f"\n", _h->id, > ##a);=C2=A0=C2=A0=C2=A0=C2=A0 \ > diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/priv.h > b/drivers/gpu/drm/nouveau/nvkm/engine/disp/priv.h > index a3fd7cb7c488..722ec340e12a 100644 > --- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/priv.h > +++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/priv.h > @@ -72,6 +72,7 @@ int gv100_disp_wndw_cnt(struct nvkm_disp *, > unsigned long *); > =C2=A0int gv100_disp_caps_new(const struct nvkm_oclass *, void *, u32, > struct nvkm_object **); > =C2=A0 > =C2=A0int tu102_disp_init(struct nvkm_disp *); > +irqreturn_t tu102_disp_intr(struct nvkm_inth *); > =C2=A0 > =C2=A0void nv50_disp_dptmds_war_2(struct nvkm_disp *, struct dcb_output > *); > =C2=A0void nv50_disp_dptmds_war_3(struct nvkm_disp *, struct dcb_output > *); > diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/tu102.c > b/drivers/gpu/drm/nouveau/nvkm/engine/disp/tu102.c > index dcb9f8ba374c..7b70b466fa36 100644 > --- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/tu102.c > +++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/tu102.c > @@ -104,6 +104,56 @@ tu102_sor_new(struct nvkm_disp *disp, int id) > =C2=A0 return nvkm_ior_new_(&tu102_sor, disp, SOR, id, hda & > BIT(id)); > =C2=A0} > =C2=A0 > +/* The GSP-RM display path leaves head-timing (vblank) interrupts > and their > + * enables to us. These program the RM head-timing line (bit 1 of > the > + * per-head enable, not the bit nvkm's own gv100 path uses). > + */ > +void > +tu102_head_vblank_put(struct nvkm_head *head) > +{ > + struct nvkm_device *device =3D head->disp- > >engine.subdev.device; > + > + nvkm_mask(device, 0x611d80 + (head->id * 4), 0x00000002, > 0x00000000); > +} > + > +void > +tu102_head_vblank_get(struct nvkm_head *head) > +{ > + struct nvkm_device *device =3D head->disp- > >engine.subdev.device; > + > + nvkm_wr32(device, 0x611800 + (head->id * 4), 0x00000002); > + nvkm_mask(device, 0x611d80 + (head->id * 4), 0x00000002, > 0x00000002); > +} > + > +static void > +tu102_disp_intr_head_timing(struct nvkm_disp *disp, int head) > +{ > + struct nvkm_subdev *subdev =3D &disp->engine.subdev; > + struct nvkm_device *device =3D subdev->device; > + u32 stat =3D nvkm_rd32(device, 0x611c00 + (head * 0x04)); > + > + if (stat & 0x00000002) { > + nvkm_disp_vblank(disp, head); > + > + nvkm_wr32(device, 0x611800 + (head * 0x04), > 0x00000002); > + } > +} > + > +irqreturn_t > +tu102_disp_intr(struct nvkm_inth *inth) > +{ > + struct nvkm_disp *disp =3D container_of(inth, typeof(*disp), > engine.subdev.inth); > + struct nvkm_subdev *subdev =3D &disp->engine.subdev; > + struct nvkm_device *device =3D subdev->device; > + unsigned long mask =3D nvkm_rd32(device, 0x611ec0) & > 0x000000ff; > + int head; > + > + for_each_set_bit(head, &mask, 8) > + tu102_disp_intr_head_timing(disp, head); > + > + return IRQ_HANDLED; > +} > + > =C2=A0int > =C2=A0tu102_disp_init(struct nvkm_disp *disp) > =C2=A0{ > diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/disp.c > b/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/disp.c > index e77733a5d9c3..8e57bb6519e5 100644 > --- a/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/disp.c > +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/disp.c > @@ -608,29 +608,12 @@ r535_sor_cnt(struct nvkm_disp *disp, unsigned > long *pmask) > =C2=A0 return 4; > =C2=A0} > =C2=A0 > -static void > -r535_head_vblank_put(struct nvkm_head *head) > -{ > - struct nvkm_device *device =3D head->disp- > >engine.subdev.device; > - > - nvkm_mask(device, 0x611d80 + (head->id * 4), 0x00000002, > 0x00000000); > -} > - > -static void > -r535_head_vblank_get(struct nvkm_head *head) > -{ > - struct nvkm_device *device =3D head->disp- > >engine.subdev.device; > - > - nvkm_wr32(device, 0x611800 + (head->id * 4), 0x00000002); > - nvkm_mask(device, 0x611d80 + (head->id * 4), 0x00000002, > 0x00000002); > -} > - > =C2=A0static const struct nvkm_head_func > =C2=A0r535_head =3D { > =C2=A0 .state =3D gv100_head_state, > =C2=A0 .rgpos =3D gv100_head_rgpos, > - .vblank_get =3D r535_head_vblank_get, > - .vblank_put =3D r535_head_vblank_put, > + .vblank_get =3D tu102_head_vblank_get, > + .vblank_put =3D tu102_head_vblank_put, > =C2=A0}; > =C2=A0 > =C2=A0static struct nvkm_conn * > @@ -1404,35 +1387,6 @@ static const struct nvkm_event_func > =C2=A0r535_disp_event =3D { > =C2=A0}; > =C2=A0 > -static void > -r535_disp_intr_head_timing(struct nvkm_disp *disp, int head) > -{ > - struct nvkm_subdev *subdev =3D &disp->engine.subdev; > - struct nvkm_device *device =3D subdev->device; > - u32 stat =3D nvkm_rd32(device, 0x611c00 + (head * 0x04)); > - > - if (stat & 0x00000002) { > - nvkm_disp_vblank(disp, head); > - > - nvkm_wr32(device, 0x611800 + (head * 0x04), > 0x00000002); > - } > -} > - > -static irqreturn_t > -r535_disp_intr(struct nvkm_inth *inth) > -{ > - struct nvkm_disp *disp =3D container_of(inth, typeof(*disp), > engine.subdev.inth); > - struct nvkm_subdev *subdev =3D &disp->engine.subdev; > - struct nvkm_device *device =3D subdev->device; > - unsigned long mask =3D nvkm_rd32(device, 0x611ec0) & > 0x000000ff; > - int head; > - > - for_each_set_bit(head, &mask, 8) > - r535_disp_intr_head_timing(disp, head); > - > - return IRQ_HANDLED; > -} > - > =C2=A0static void > =C2=A0r535_disp_fini(struct nvkm_disp *disp, bool suspend) > =C2=A0{ > @@ -1708,7 +1662,7 @@ r535_disp_oneinit(struct nvkm_disp *disp) > =C2=A0 return ret; > =C2=A0 > =C2=A0 ret =3D nvkm_inth_add(&device->vfn->intr, ret, > NVKM_INTR_PRIO_NORMAL, &disp->engine.subdev, > - =C2=A0=C2=A0=C2=A0 r535_disp_intr, &disp- > >engine.subdev.inth); > + =C2=A0=C2=A0=C2=A0 tu102_disp_intr, &disp- > >engine.subdev.inth); > =C2=A0 if (ret) > =C2=A0 return ret; > =C2=A0