From: "Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>
To: "David E. Box" <david.e.box@linux.intel.com>
Cc: LKML <linux-kernel@vger.kernel.org>,
platform-driver-x86@vger.kernel.org,
rajvi.jingar@linux.intel.com
Subject: Re: [PATCH 01/11] platform/x86/intel/vsec: Add intel_vsec_register
Date: Tue, 26 Sep 2023 17:17:59 +0300 (EEST) [thread overview]
Message-ID: <1ed7ddc8-18a-cfbc-a4cd-baaa5751493e@linux.intel.com> (raw)
In-Reply-To: <20230922213032.1770590-2-david.e.box@linux.intel.com>
On Fri, 22 Sep 2023, David E. Box wrote:
> From: Gayatri Kammela <gayatri.kammela@linux.intel.com>
>
> Add and export intel_vsec_register() to allow the registration of Intel
> extended capabilities from other drivers. Add check to look for memory
> conflicts before registering a new capability.
>
> Signed-off-by: Gayatri Kammela <gayatri.kammela@linux.intel.com>
> Signed-off-by: David E. Box <david.e.box@linux.intel.com>
> ---
> drivers/platform/x86/intel/pmt/class.c | 2 +-
> drivers/platform/x86/intel/vsec.c | 58 ++++++++++----------------
> drivers/platform/x86/intel/vsec.h | 42 ++++++++++++++++++-
> 3 files changed, 63 insertions(+), 39 deletions(-)
>
> diff --git a/drivers/platform/x86/intel/pmt/class.c b/drivers/platform/x86/intel/pmt/class.c
> index f32a233470de..2ad91d2fd954 100644
> --- a/drivers/platform/x86/intel/pmt/class.c
> +++ b/drivers/platform/x86/intel/pmt/class.c
> @@ -31,7 +31,7 @@ bool intel_pmt_is_early_client_hw(struct device *dev)
> * differences from the server platforms (which use the Out Of Band
> * Management Services Module OOBMSM).
> */
> - return !!(ivdev->info->quirks & VSEC_QUIRK_EARLY_HW);
> + return !!(ivdev->quirks & VSEC_QUIRK_EARLY_HW);
> }
> EXPORT_SYMBOL_NS_GPL(intel_pmt_is_early_client_hw, INTEL_PMT);
>
> diff --git a/drivers/platform/x86/intel/vsec.c b/drivers/platform/x86/intel/vsec.c
> index c1f9e4471b28..c5d0202068cf 100644
> --- a/drivers/platform/x86/intel/vsec.c
> +++ b/drivers/platform/x86/intel/vsec.c
> @@ -24,13 +24,6 @@
>
> #include "vsec.h"
>
> -/* Intel DVSEC offsets */
> -#define INTEL_DVSEC_ENTRIES 0xA
> -#define INTEL_DVSEC_SIZE 0xB
> -#define INTEL_DVSEC_TABLE 0xC
> -#define INTEL_DVSEC_TABLE_BAR(x) ((x) & GENMASK(2, 0))
> -#define INTEL_DVSEC_TABLE_OFFSET(x) ((x) & GENMASK(31, 3))
> -#define TABLE_OFFSET_SHIFT 3
> #define PMT_XA_START 0
> #define PMT_XA_MAX INT_MAX
> #define PMT_XA_LIMIT XA_LIMIT(PMT_XA_START, PMT_XA_MAX)
> @@ -39,34 +32,6 @@ static DEFINE_IDA(intel_vsec_ida);
> static DEFINE_IDA(intel_vsec_sdsi_ida);
> static DEFINE_XARRAY_ALLOC(auxdev_array);
>
> -/**
> - * struct intel_vsec_header - Common fields of Intel VSEC and DVSEC registers.
> - * @rev: Revision ID of the VSEC/DVSEC register space
> - * @length: Length of the VSEC/DVSEC register space
> - * @id: ID of the feature
> - * @num_entries: Number of instances of the feature
> - * @entry_size: Size of the discovery table for each feature
> - * @tbir: BAR containing the discovery tables
> - * @offset: BAR offset of start of the first discovery table
> - */
> -struct intel_vsec_header {
> - u8 rev;
> - u16 length;
> - u16 id;
> - u8 num_entries;
> - u8 entry_size;
> - u8 tbir;
> - u32 offset;
> -};
> -
> -enum intel_vsec_id {
> - VSEC_ID_TELEMETRY = 2,
> - VSEC_ID_WATCHER = 3,
> - VSEC_ID_CRASHLOG = 4,
> - VSEC_ID_SDSI = 65,
> - VSEC_ID_TPMI = 66,
> -};
> -
> static const char *intel_vsec_name(enum intel_vsec_id id)
> {
> switch (id) {
> @@ -223,19 +188,28 @@ static int intel_vsec_add_dev(struct pci_dev *pdev, struct intel_vsec_header *he
> header->offset + i * (header->entry_size * sizeof(u32));
> tmp->end = tmp->start + (header->entry_size * sizeof(u32)) - 1;
> tmp->flags = IORESOURCE_MEM;
> +
> + /* Check resource is not in use */
> + if (!request_mem_region(tmp->start, resource_size(tmp), "")) {
> + kfree(res);
> + kfree(intel_vsec_dev);
> + return -EBUSY;
> + }
> +
> + release_mem_region(tmp->start, resource_size(tmp));
> }
>
> intel_vsec_dev->pcidev = pdev;
> intel_vsec_dev->resource = res;
> intel_vsec_dev->num_resources = header->num_entries;
> - intel_vsec_dev->info = info;
> + intel_vsec_dev->quirks = info->quirks;
>
> if (header->id == VSEC_ID_SDSI)
> intel_vsec_dev->ida = &intel_vsec_sdsi_ida;
> else
> intel_vsec_dev->ida = &intel_vsec_ida;
>
> - return intel_vsec_add_aux(pdev, NULL, intel_vsec_dev,
> + return intel_vsec_add_aux(pdev, info->parent, intel_vsec_dev,
> intel_vsec_name(header->id));
> }
>
> @@ -353,6 +327,16 @@ static bool intel_vsec_walk_vsec(struct pci_dev *pdev,
> return have_devices;
> }
>
> +void intel_vsec_register(struct pci_dev *pdev,
> + struct intel_vsec_platform_info *info)
> +{
> + if (!pdev || !info)
> + return;
> +
> + intel_vsec_walk_header(pdev, info);
> +}
> +EXPORT_SYMBOL_NS_GPL(intel_vsec_register, INTEL_VSEC);
> +
> static int intel_vsec_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
> {
> struct intel_vsec_platform_info *info;
> diff --git a/drivers/platform/x86/intel/vsec.h b/drivers/platform/x86/intel/vsec.h
> index 0fd042c171ba..ab0f161f86c5 100644
> --- a/drivers/platform/x86/intel/vsec.h
> +++ b/drivers/platform/x86/intel/vsec.h
> @@ -11,9 +11,45 @@
> #define VSEC_CAP_SDSI BIT(3)
> #define VSEC_CAP_TPMI BIT(4)
>
> +/* Intel DVSEC offsets */
> +#define INTEL_DVSEC_ENTRIES 0xA
> +#define INTEL_DVSEC_SIZE 0xB
> +#define INTEL_DVSEC_TABLE 0xC
> +#define INTEL_DVSEC_TABLE_BAR(x) ((x) & GENMASK(2, 0))
> +#define INTEL_DVSEC_TABLE_OFFSET(x) ((x) & GENMASK(31, 3))
> +#define TABLE_OFFSET_SHIFT 3
> +
> struct pci_dev;
> struct resource;
>
> +enum intel_vsec_id {
> + VSEC_ID_TELEMETRY = 2,
> + VSEC_ID_WATCHER = 3,
> + VSEC_ID_CRASHLOG = 4,
> + VSEC_ID_SDSI = 65,
> + VSEC_ID_TPMI = 66,
> +};
> +
> +/**
> + * struct intel_vsec_header - Common fields of Intel VSEC and DVSEC registers.
> + * @rev: Revision ID of the VSEC/DVSEC register space
> + * @length: Length of the VSEC/DVSEC register space
> + * @id: ID of the feature
> + * @num_entries:Number of instances of the feature
> + * @entry_size: Size of the discovery table for each feature
> + * @tbir: BAR containing the discovery tables
> + * @offset: BAR offset of start of the first discovery table
> + */
> +struct intel_vsec_header {
> + u8 rev;
> + u16 length;
> + u16 id;
> + u8 num_entries;
> + u8 entry_size;
> + u8 tbir;
> + u32 offset;
> +};
> +
> enum intel_vsec_quirks {
> /* Watcher feature not supported */
> VSEC_QUIRK_NO_WATCHER = BIT(0),
> @@ -33,6 +69,7 @@ enum intel_vsec_quirks {
>
> /* Platform specific data */
> struct intel_vsec_platform_info {
> + struct device *parent;
> struct intel_vsec_header **headers;
> unsigned long caps;
> unsigned long quirks;
> @@ -43,10 +80,10 @@ struct intel_vsec_device {
> struct pci_dev *pcidev;
> struct resource *resource;
> struct ida *ida;
> - struct intel_vsec_platform_info *info;
> int num_resources;
> void *priv_data;
> size_t priv_data_size;
> + unsigned long quirks;
> };
>
> int intel_vsec_add_aux(struct pci_dev *pdev, struct device *parent,
> @@ -62,4 +99,7 @@ static inline struct intel_vsec_device *auxdev_to_ivdev(struct auxiliary_device
> {
> return container_of(auxdev, struct intel_vsec_device, auxdev);
> }
> +
> +void intel_vsec_register(struct pci_dev *pdev,
> + struct intel_vsec_platform_info *info);
> #endif
>
Please split this patch properly. I see at least 3 components (some of
which were not even mentioned in the changelog):
- Moving enum, struct & defines (no functional changes intended patch)
- Moving quirks to new place
- The rest
--
i.
next prev parent reply other threads:[~2023-09-26 14:19 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-09-22 21:30 [PATCH 00/11] intel_pmc: Add telemetry API to read counters David E. Box
2023-09-22 21:30 ` [PATCH 01/11] platform/x86/intel/vsec: Add intel_vsec_register David E. Box
2023-09-26 14:17 ` Ilpo Järvinen [this message]
2023-09-26 23:51 ` David E. Box
2023-09-22 21:30 ` [PATCH 02/11] platform/x86/intel/vsec: Add base address field David E. Box
2023-09-26 14:39 ` Ilpo Järvinen
2023-09-22 21:30 ` [PATCH 03/11] platform/x86/intel/pmt: Add header to struct intel_pmt_entry David E. Box
2023-09-26 14:43 ` Ilpo Järvinen
2023-09-22 21:30 ` [PATCH 04/11] platform/x86/intel/pmt: telemetry: Export API to read telemetry David E. Box
2023-09-26 15:40 ` Ilpo Järvinen
2023-09-26 23:59 ` David E. Box
2023-09-22 21:30 ` [PATCH 05/11] platform/x86:intel/pmc: Move get_low_power_modes function David E. Box
2023-09-26 15:56 ` Ilpo Järvinen
2023-09-27 0:16 ` David E. Box
2023-09-22 21:30 ` [PATCH 06/11] platform/x86/intel/pmc: Split pmc_core_ssram_get_pmc() David E. Box
2023-09-22 21:30 ` [PATCH 07/11] platform/x86/intel/pmc: Find and register PMC telemetry entries David E. Box
2023-09-22 21:30 ` [PATCH 08/11] platform/x86/intel/pmc: Display LPM requirements for multiple PMCs David E. Box
2023-09-22 21:30 ` [PATCH 09/11] platform/x86/intel/pmc: Retrieve LPM information using Intel PMT David E. Box
2023-09-26 16:07 ` Ilpo Järvinen
2023-09-22 21:30 ` [PATCH 10/11] platform/x86/intel/pmc: Read low power mode requirements for MTL-M and MTL-P David E. Box
2023-09-26 16:03 ` Ilpo Järvinen
2023-09-27 0:20 ` David E. Box
2023-09-22 21:30 ` [PATCH 11/11] platform/x86/intel/pmc: Add debug attribute for Die C6 counter David E. Box
2023-09-26 16:11 ` Ilpo Järvinen
-- strict thread matches above, loose matches on Subject: below --
2023-03-15 18:33 [PATCH 00/11] Intel pmc_core: Enable telemetry David E. Box
2023-03-15 18:33 ` [PATCH 01/11] platform/x86/intel/vsec: Add intel_vsec_register David E. Box
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