Re: [PATCH v3 12/14] x86/svm: Cleanup LBRV tests

Yosry Ahmed
2025-11-14T05:41:05Z

On Fri, Nov 14, 2025 at 10:27:07AM +0530, Shivansh Dhiman wrote:
> Hi Yosry,
>
> On 13-11-2025 20:29, Yosry Ahmed wrote:
> > On Thu, Nov 13, 2025 at 05:28:11PM +0530, Shivansh Dhiman wrote:
> >> Hi Yosry,
> >>
> >> I tested this on EPYC-Turin and found that some tests seem to be a bit flaky.
> >> See below.
> >
> > Which ones? I was also running the tests on EPYC-Turin.
>
> Most of the nested LBRV tests had this issue. I checked your other patch to fix
> this. I tested it and it does fixes it for me. Thanks.

Yeah it was an unrelated problem, and it only flaked on some machines.
Apparently even though the APM does not mention usage of any of the
higher bits in LBR MSRs, they are in fact used. The PPR of some models
show that some of the upper bits are reserved.

I think the failure was due to bit 62 being set, which I think is the
speculation bit, which explains why it's inconsistent.

Anyway, thanks for confirming.