Re: [PATCH v3 03/14] x86/svm: Cleanup selective cr0 write intercept test

Manali Shukla
2025-11-12T13:48:39Z

On 11/11/2025 4:56 AM, Yosry Ahmed wrote:
> Rename the test and functions to more general names describing the test
> more accurately. Use X86_CR0_CD instead of hardcoding the bitmask, and
> explicitly clear the bit in the prepare() function to make it clearer
> that it would only be set by the test.
>
> Signed-off-by: Yosry Ahmed <yosry.ahmed@linux.dev>
> ---
> x86/svm_tests.c | 22 +++++++++-------------
> 1 file changed, 9 insertions(+), 13 deletions(-)
>
> diff --git a/x86/svm_tests.c b/x86/svm_tests.c
> index 80d5aeb108650..e911659194b3d 100644
> --- a/x86/svm_tests.c
> +++ b/x86/svm_tests.c
> @@ -793,23 +793,19 @@ static bool check_asid_zero(struct svm_test *test)
> return vmcb->control.exit_code == SVM_EXIT_ERR;
> }
>
> -static void sel_cr0_bug_prepare(struct svm_test *test)
> +static void prepare_sel_cr0_intercept(struct svm_test *test)
> {
> + vmcb->save.cr0 &= ~X86_CR0_CD;
> vmcb->control.intercept |= (1ULL << INTERCEPT_SELECTIVE_CR0);
> }
>
> -static bool sel_cr0_bug_finished(struct svm_test *test)
> -{
> - return true;
> -}
> -
> -static void sel_cr0_bug_test(struct svm_test *test)
> +static void test_sel_cr0_write_intercept(struct svm_test *test)
> {
> unsigned long cr0;
>
> - /* read cr0, clear CD, and write back */
> + /* read cr0, set CD, and write back */
> cr0 = read_cr0();
> - cr0 |= (1UL << 30);
> + cr0 |= X86_CR0_CD;
> write_cr0(cr0);
>
> /*
> @@ -821,7 +817,7 @@ static void sel_cr0_bug_test(struct svm_test *test)
> exit(report_summary());
> }
>
> -static bool sel_cr0_bug_check(struct svm_test *test)
> +static bool check_sel_cr0_intercept(struct svm_test *test)
> {
> return vmcb->control.exit_code == SVM_EXIT_CR0_SEL_WRITE;
> }
> @@ -3486,9 +3482,9 @@ struct svm_test svm_tests[] = {
> { "asid_zero", default_supported, prepare_asid_zero,
> default_prepare_gif_clear, test_asid_zero,
> default_finished, check_asid_zero },
> - { "sel_cr0_bug", default_supported, sel_cr0_bug_prepare,
> - default_prepare_gif_clear, sel_cr0_bug_test,
> - sel_cr0_bug_finished, sel_cr0_bug_check },
> + { "sel cr0 write intercept", default_supported,
> + prepare_sel_cr0_intercept, default_prepare_gif_clear,
> + test_sel_cr0_write_intercept, default_finished, check_sel_cr0_intercept},
> { "tsc_adjust", tsc_adjust_supported, tsc_adjust_prepare,
> default_prepare_gif_clear, tsc_adjust_test,
> default_finished, tsc_adjust_check },

LGTM

Reviewed-by: Manali Shukla <manali.shukla@amd.com>

Tested on AMD Genoa machine. This test case works as expected.

Tested-by: Manali Shukla <manali.shukla@amd.com>