From: Jerome Brunet <jbrunet@baylibre.com>
To: Martin Blumenstingl <martin.blumenstingl@googlemail.com>,
linux-amlogic@lists.infradead.org, sboyd@kernel.org
Cc: narmstrong@baylibre.com, mturquette@baylibre.com,
linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 0/2] clk: Meson8/8b/8m2: fix the mali clock flags
Date: Tue, 07 Jan 2020 12:03:15 +0100 [thread overview]
Message-ID: <1j36crsf4c.fsf@starbuckisacylon.baylibre.com> (raw)
In-Reply-To: <20191226191224.3785282-1-martin.blumenstingl@googlemail.com>
On Thu 26 Dec 2019 at 20:12, Martin Blumenstingl <martin.blumenstingl@googlemail.com> wrote:
> While playing with devfreq support for the lima driver I experienced
> sporadic (random) system lockups. It turned out that this was in
> certain cases when changing the mali clock.
>
> The Amlogic vendor GPU platform driver (which is responsible for
> changing the clock frequency) uses the following pattern when updating
> the mali clock rate:
> - at initialization: initialize the two mali_0 and mali_1 clock trees
> with a default setting and enable both clocks
> - when changing the clock frequency:
> -- set HHI_MALI_CLK_CNTL[31] to temporarily use the mali_1 clock output
> -- update the mali_0 clock tree (set the mux, divider, etc.)
> -- clear HHI_MALI_CLK_CNTL[31] to temporarily use the mali_0 clock
> output again
>
> With the common clock framework we can even do better:
> by setting CLK_SET_RATE_PARENT for the mali_0 and mali_1 output gates
> we can force the common clock framework to update the "inactive" clock
> and then switch to it's output.
>
> I only tested this patch for a limited time only (approx. 2 hours).
> So far I couldn't reproduce the sporadic system lockups with it.
> However, broader testing would be great so I would like this to be
> applied for -next.
>
> Changes since v1 at [0]:
> - extend the existing comment in patch #1 to describe how the glitch-
> free mux works with the CCF
> - slightly updated the patch description of patch #1 to clarify that
> the "mali_0" or "mali_1" trees must not be changed while running
> - add patch #2 to update the clk_set_rate() kerneldoc because we agreed
> that clk_set_rate() should do a root-to-leaf update (it does already,
> it's just not documented)
>
>
> [0] https://patchwork.kernel.org/cover/11293177/
>
>
> Martin Blumenstingl (2):
> clk: meson: meson8b: make the CCF use the glitch-free "mali" mux
> clk: clarify that clk_set_rate() does updates from top to bottom
>
Applied with Stephen's Ack
> drivers/clk/meson/meson8b.c | 11 +++++++----
> include/linux/clk.h | 3 +++
> 2 files changed, 10 insertions(+), 4 deletions(-)
prev parent reply other threads:[~2020-01-07 11:03 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-12-26 19:12 [PATCH v2 0/2] clk: Meson8/8b/8m2: fix the mali clock flags Martin Blumenstingl
2019-12-26 19:12 ` [PATCH v2 1/2] clk: meson: meson8b: make the CCF use the glitch-free "mali" mux Martin Blumenstingl
2019-12-26 19:12 ` [PATCH v2 2/2] clk: clarify that clk_set_rate() does updates from top to bottom Martin Blumenstingl
2020-01-06 3:03 ` Stephen Boyd
2020-01-07 11:03 ` Jerome Brunet [this message]
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