From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C0B4FC63798 for ; Thu, 26 Nov 2020 16:42:03 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 7D85E20B80 for ; Thu, 26 Nov 2020 16:42:03 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=baylibre-com.20150623.gappssmtp.com header.i=@baylibre-com.20150623.gappssmtp.com header.b="WjDINmeA" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2403816AbgKZQmC (ORCPT ); Thu, 26 Nov 2020 11:42:02 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58500 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2391290AbgKZQmC (ORCPT ); Thu, 26 Nov 2020 11:42:02 -0500 Received: from mail-wm1-x343.google.com (mail-wm1-x343.google.com [IPv6:2a00:1450:4864:20::343]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C0635C0613D4 for ; Thu, 26 Nov 2020 08:42:01 -0800 (PST) Received: by mail-wm1-x343.google.com with SMTP id s13so2998547wmh.4 for ; Thu, 26 Nov 2020 08:42:01 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20150623.gappssmtp.com; s=20150623; h=references:user-agent:from:to:cc:subject:in-reply-to:message-id :date:mime-version; bh=v5wyIhDUOH2agq/x4cg8x2Wwtde7ho+Gjeh3QXf9gbE=; b=WjDINmeAfuyLwhVMnUMkS63eEhCvuYmnexSvPb4HPPNCvT20gVuwNTlIooBUfimO0X DsC9VQn/Y2ppGj7a5WEco41limooaxAdrRHNy1q4wP201MMP64/GByUXXIK7qbVmmkeN YCAR5K/ToDAJ3ofKUysI5lo4zXywfAUr5n0tIf/l8iofsySPLzCmrXG7y6T+CDrt0r6H tusi/vo2AVKY3m6g66HQmWdCB3Lzi1RhYSCyrWBIKGSnI7nr8Wl5s8rbWpVrzFIM2CEf TYtc/9v7nNpI/S3xem7HSvh3Au7ejkLb7r7CSYlchdb9x12JPFOTyiF03a3dPfSCkKCY oLAw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:references:user-agent:from:to:cc:subject :in-reply-to:message-id:date:mime-version; bh=v5wyIhDUOH2agq/x4cg8x2Wwtde7ho+Gjeh3QXf9gbE=; b=CUKP/H2AjibGQC6qce8WTxjwkrhNE6dVQYK8O7vISwqLgD6GKinYfr+rrBzsd3GzmM /smnhFZrDUtSpZF9mfDuETt7gNGm6gLaLrEJH0PUgtJfIicV5Uavpj0ngAOpD34Rrvsf Xa3owRcmYC8Wv2QVBUuXi5Kp2tlhO5Zx8gQFdxrSk5OQVf0JV1uXGnwwh+CrWHvwK41U hzUsxsmPH29PGGLvnccSw0M0sEV8FC5zJoM80RZClskSvF+QFKBHrTgKLc79YQsIKo// X0Bk3hmkOXdrPIVuuXUPIURqCPs1OcS/Sp+UOQhYlBPUHPie7KIBCh6mtxJUjfVJyPwH RYKg== X-Gm-Message-State: AOAM532rwRXktUxoBVfKTw+DXyM3mag3Qr5i1nxCtrg/qEf7kFeSpAvO t1EXufaNAhKI2hMbf1HN9Q8YQQ== X-Google-Smtp-Source: ABdhPJzrDpc/4cZPXo1+i+uc6IDMIE98gACt8UkwYjpI0h+ejw9io3H5nFPd20XxRiMX9KO8y+04sQ== X-Received: by 2002:a1c:b402:: with SMTP id d2mr4345453wmf.38.1606408920466; Thu, 26 Nov 2020 08:42:00 -0800 (PST) Received: from localhost (253.35.17.109.rev.sfr.net. [109.17.35.253]) by smtp.gmail.com with ESMTPSA id a14sm9596885wmj.40.2020.11.26.08.41.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 26 Nov 2020 08:41:59 -0800 (PST) References: <20201126141600.2084586-1-narmstrong@baylibre.com> User-agent: mu4e 1.4.10; emacs 27.1 From: Jerome Brunet To: Neil Armstrong Cc: linux-clk@vger.kernel.org, linux-amlogic@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v2 0/2] clk: meson: g12a: add MIPI DSI Host Pixel Clock In-reply-to: <20201126141600.2084586-1-narmstrong@baylibre.com> Message-ID: <1j5z5sysrt.fsf@starbuckisacylon.baylibre.com> Date: Thu, 26 Nov 2020 17:41:58 +0100 MIME-Version: 1.0 Content-Type: text/plain Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu 26 Nov 2020 at 15:15, Neil Armstrong wrote: > This serie adss the MIPI DSI Host Pixel Clock used to feed the DSI pixel > clock to the DSI Host controller. > > Unlike the AXG SoC, the DSI Pixel Clock has a supplementary mux, divider and gate > stage before feeding the pixel clock to the MIPI DSI Host controller. > > Changes since v1 at [1]: > - switch g12a_mipi_dsi_pxclk_sel flags to CLK_SET_RATE_NO_REPARENT > - fix aligment of g12a_mipi_dsi_pxclk_div & g12a_mipi_dsi_pxclk parent_hws > > [1] https://lore.kernel.org/r/20201123163811.353444-1-narmstrong@baylibre.com > > Neil Armstrong (2): > dt-bindings: clk: g12a-clkc: add DSI Pixel clock bindings > clk: meson: g12a: add MIPI DSI Host Pixel Clock > > drivers/clk/meson/g12a.c | 74 +++++++++++++++++++++++++++ > drivers/clk/meson/g12a.h | 3 +- > include/dt-bindings/clock/g12a-clkc.h | 2 + > 3 files changed, 78 insertions(+), 1 deletion(-) Applied, Thx