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From: Jerome Brunet <jbrunet@baylibre.com>
To: Yu Tu <yu.tu@amlogic.com>,
	linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org,
	devicetree@vger.kernel.org, Rob Herring <robh+dt@kernel.org>,
	Neil Armstrong <neil.armstrong@linaro.org>,
	Kevin Hilman <khilman@baylibre.com>,
	Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Cc: "kelvin . zhang" <Kelvin.Zhang@amlogic.com>,
	"qi . duan" <qi.duan@amlogic.com>
Subject: Re: [PATCH V6 0/3] Add S4 SoC PLL and Peripheral clock controller
Date: Thu, 19 Jan 2023 12:18:30 +0100	[thread overview]
Message-ID: <1jilh2ydns.fsf@starbuckisacylon.baylibre.com> (raw)
In-Reply-To: <20230116074214.2326-1-yu.tu@amlogic.com>


On Mon 16 Jan 2023 at 15:42, Yu Tu <yu.tu@amlogic.com> wrote:

> 1. Add S4 SoC PLL and Peripheral clock controller dt-bindings.
> 2. Add PLL and Peripheral clock controller driver for S4 SOC.
>
> Yu Tu (3):
>   dt-bindings: clock: document Amlogic S4 SoC PLL & peripheral clock
>     controller
>   clk: meson: S4: add support for Amlogic S4 SoC PLL clock driver
>   clk: meson: s4: add support for Amlogic S4 SoC peripheral clock
>     controller

You are adding 2 controller driver with this series.
Making 2 driver patches on clk/ is good. Please do the same for the bindings

>
> V5 -> V6: Change send patch series, as well change format and clock flags.
> V4 -> V5: change format and clock flags and adjust the patch series as suggested
> by Jerome.
> V3 -> V4: change format and clock flags.
> V2 -> V3: Use two clock controller.
> V1 -> V2: Change format as discussed in the email.
>
> Link:https://lore.kernel.org/all/20221123021346.18136-1-yu.tu@amlogic.com/
>
>  .../clock/amlogic,s4-peripherals-clkc.yaml    |  104 +
>  .../bindings/clock/amlogic,s4-pll-clkc.yaml   |   50 +
>  MAINTAINERS                                   |    1 +
>  drivers/clk/meson/Kconfig                     |   25 +
>  drivers/clk/meson/Makefile                    |    2 +
>  drivers/clk/meson/s4-peripherals.c            | 3874 +++++++++++++++++
>  drivers/clk/meson/s4-peripherals.h            |  218 +
>  drivers/clk/meson/s4-pll.c                    |  875 ++++
>  drivers/clk/meson/s4-pll.h                    |   88 +
>  .../clock/amlogic,s4-peripherals-clkc.h       |  131 +
>  .../dt-bindings/clock/amlogic,s4-pll-clkc.h   |   30 +
>  11 files changed, 5398 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/clock/amlogic,s4-peripherals-clkc.yaml
>  create mode 100644 Documentation/devicetree/bindings/clock/amlogic,s4-pll-clkc.yaml
>  create mode 100644 drivers/clk/meson/s4-peripherals.c
>  create mode 100644 drivers/clk/meson/s4-peripherals.h
>  create mode 100644 drivers/clk/meson/s4-pll.c
>  create mode 100644 drivers/clk/meson/s4-pll.h
>  create mode 100644 include/dt-bindings/clock/amlogic,s4-peripherals-clkc.h
>  create mode 100644 include/dt-bindings/clock/amlogic,s4-pll-clkc.h
>
>
> base-commit: 1b929c02afd37871d5afb9d498426f83432e71c2


  parent reply	other threads:[~2023-01-19 11:20 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-01-16  7:42 [PATCH V6 0/3] Add S4 SoC PLL and Peripheral clock controller Yu Tu
2023-01-16  7:42 ` [PATCH V6 1/3] dt-bindings: clock: document Amlogic S4 SoC PLL & peripheral " Yu Tu
2023-01-16  8:29   ` Krzysztof Kozlowski
2023-01-16  9:31     ` Yu Tu
2023-01-19  0:38       ` Kevin Hilman
2023-01-20  2:25         ` Yu Tu
2023-01-25  0:25           ` Kevin Hilman
2023-01-28  8:19             ` Yu Tu
2023-01-20  9:37       ` Jerome Brunet
2023-01-28  8:23         ` Yu Tu
2023-01-16  7:42 ` [PATCH V6 2/3] clk: meson: S4: add support for Amlogic S4 SoC PLL clock driver Yu Tu
2023-01-19 11:20   ` Jerome Brunet
2023-01-20  2:58     ` Yu Tu
2023-01-20  9:43       ` Jerome Brunet
2023-01-28  8:36         ` Yu Tu
2023-01-16  7:42 ` [PATCH V6 3/3] clk: meson: s4: add support for Amlogic S4 SoC peripheral clock controller Yu Tu
2023-01-19 11:37   ` Jerome Brunet
2023-01-20  3:33     ` Yu Tu
2023-01-20  9:47       ` Jerome Brunet
2023-01-28 10:17         ` Yu Tu
2023-01-30  9:06           ` Jerome Brunet
2023-01-30  9:41             ` Yu Tu
2023-01-30  9:47               ` Jerome Brunet
2023-01-30  9:59                 ` Yu Tu
2023-01-30 10:07                   ` Jerome Brunet
2023-01-31  3:29                     ` Yu Tu
2023-01-19 11:18 ` Jerome Brunet [this message]
2023-01-20  2:31   ` [PATCH V6 0/3] Add S4 SoC PLL and Peripheral " Yu Tu

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