From: Steven Walter <srwalter@yahoo.com>
To: "Victor J. Orlikowski" <v.j.orlikowski@gte.net>
Cc: linux-kernel@vger.kernel.org
Subject: Re: Freeze and reboot with 2.4.0-test12-pre5
Date: Sun, 10 Dec 2000 00:42:42 -0600 [thread overview]
Message-ID: <20001210004242.A7959@hapablap.dyn.dhs.org> (raw)
In-Reply-To: <20001210000432.A7770@hapablap.dyn.dhs.org> <14899.9262.948012.985914@critterling.garfield.home>
In-Reply-To: <14899.9262.948012.985914@critterling.garfield.home>; from v.j.orlikowski@gte.net on Sun, Dec 10, 2000 at 01:35:26AM -0500
On Sun, Dec 10, 2000 at 01:35:26AM -0500, Victor J. Orlikowski wrote:
> Steven,
>
> One question:
> Do you have MTRR enabled?
> If so, a temporary workaround is to re-compile the kernel with
> it disabled.
To confirm, yes, I do have MTRR's enabled. I'll see if that fixes it...
it hasn't happened in the past (checks uptime) 1 day and 9 hours, so
Out of curiosity, has someone found a reliable way of reproducing this?
> This is getting to be something of an epidemic.
> As I said, AMD's docs state that the write-combining was
> altered in the model and stepping stated. However, I would not
> consider myself *nearly* experienced enough in x86 assembler to start
> playing around with trying to work up a patch.
>
--
-Steven
"Voters decide nothing. Vote counters decide everything."
-Joseph Stalin
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prev parent reply other threads:[~2000-12-10 7:14 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2000-12-10 6:04 Freeze and reboot with 2.4.0-test12-pre5 Steven Walter
2000-12-10 6:35 ` Victor J. Orlikowski
2000-12-10 6:42 ` Steven Walter [this message]
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