From: Russell King <rmk@arm.linux.org.uk>
To: daniel sheltraw <l5gibson@hotmail.com>
Cc: linux-kernel@vger.kernel.org
Subject: Re: busmaster question
Date: Sat, 28 Apr 2001 09:25:05 +0100 [thread overview]
Message-ID: <20010428092505.A21488@flint.arm.linux.org.uk> (raw)
In-Reply-To: <F50IEAOeIiGXix4A2Dr00010c13@hotmail.com>
In-Reply-To: <F50IEAOeIiGXix4A2Dr00010c13@hotmail.com>; from l5gibson@hotmail.com on Sat, Apr 28, 2001 at 01:27:30AM -0500
On Sat, Apr 28, 2001 at 01:27:30AM -0500, daniel sheltraw wrote:
> I have a busmaster question I am hoping you can help me with.
> If a PCI device is acting as a busmaster and the processor initiates a
> read/write to another device on the PCI bus while the busmater-device is in
> control of the bus what happens to the instructions initiated by the
> processor? Are they never seen by the device that the processor
> is trying to read/write?
The access by the processor is delayed until the PCI arbiter allows the
CPU access to the PCI bus (how long depends on all sorts of things which
I won't go into, but its not necessarily held off until the end of the
busmaster transfer).
--
Russell King (rmk@arm.linux.org.uk) The developer of ARM Linux
http://www.arm.linux.org.uk/personal/aboutme.html
next prev parent reply other threads:[~2001-04-28 8:25 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2001-04-28 6:27 busmaster question daniel sheltraw
2001-04-28 8:25 ` Russell King [this message]
2001-04-28 13:32 ` Jeremy Jackson
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