Setting up MTRRs for 4096MB RAM

Setting up MTRRs for 4096MB RAM

[Corin Hartland-Swann]

Hi there,

I am trying to set up a machine using the Tyan Tiger LE motherboard, and
ServerWorks III LE chipset to use 4096MB RAM. I'm using kernel 2.4.7 with
CONFIG_HIGHMEM4G.

I know that I have to set the MTRR's up to extend the cacheable memory
area, but can't work out how to set it up.

I tried the following:

  # echo "disable=1" >| /proc/mtrr
  # echo "disable=0" >| /proc/mtrr
  # echo "base=0x0 size=0xFFFFFFFF type=write-back" >| /proc/mtrr
  mtrr: size and base must be multiples of 4 kiB
  mtrr: size: 0xffffffff  base: 0x0

Which doesn't make any sense. So I tried for 3G RAM:

  # echo "base=0x0 size=0xC0000000 type=write-back" >| /proc/mtrr
  mtrr: base(0x0000) is not aligned on a size(0xc0000000) boundary

And then for 2G RAM:

  # echo "base=0x0 size=0x80000000 type=write-back" >| /proc/mtrr

Which works perfectly. What gives?

Also: the instructions in Documentation/mtrr.txt says to use ">|" instead
of ">" (under bash, at least) - what does this accomplish?

Thanks,

Corin

/------------------------+-------------------------------------\
| Corin Hartland-Swann   |    Tel: +44 (0) 20 7491 2000        |
| Commerce Internet Ltd  |    Fax: +44 (0) 20 7491 2010        |
| 22 Cavendish Buildings | Mobile: +44 (0) 79 5854 0027        | 
| Gilbert Street         |                                     |
| Mayfair                |    Web: http://www.commerce.uk.net/ |
| London W1K 5HJ         | E-Mail: cdhs@commerce.uk.net        |
\------------------------+-------------------------------------/

Re: Setting up MTRRs for 4096MB RAM

[H. Peter Anvin]

Followup to:  <Pine.LNX.4.21.0108091306550.18150-100000@willow.commerce.uk.net>
By author:    Corin Hartland-Swann <cdhs@commerce.uk.net>
In newsgroup: linux.dev.kernel
> 
> I am trying to set up a machine using the Tyan Tiger LE motherboard, and
> ServerWorks III LE chipset to use 4096MB RAM. I'm using kernel 2.4.7 with
> CONFIG_HIGHMEM4G.
> 
> I know that I have to set the MTRR's up to extend the cacheable memory
> area, but can't work out how to set it up.
> 
> I tried the following:
> 
>   # echo "disable=1" >| /proc/mtrr
>   # echo "disable=0" >| /proc/mtrr
>   # echo "base=0x0 size=0xFFFFFFFF type=write-back" >| /proc/mtrr
>   mtrr: size and base must be multiples of 4 kiB
>   mtrr: size: 0xffffffff  base: 0x0
> 
> Which doesn't make any sense. So I tried for 3G RAM:
> 
>   # echo "base=0x0 size=0xC0000000 type=write-back" >| /proc/mtrr
>   mtrr: base(0x0000) is not aligned on a size(0xc0000000) boundary
> 
> And then for 2G RAM:
> 
>   # echo "base=0x0 size=0x80000000 type=write-back" >| /proc/mtrr
> 
> Which works perfectly. What gives?
> 

Intel MTRRs have to be a multiple of 2, so you'd need 2 MTRRs if you
wanted to cover 3 GB.  0x80000000 is a multiple of 2; 0xC0000000
isn't, and 0xFFFFFFFF definitely isn't, although 0x100000000 is.

I'm surprised you didn't see that very pattern in your own responses:
you are entering the full size in the working case, but then subtract
1 in the 4 GB case.

	-hpa
-- 
<hpa@transmeta.com> at work, <hpa@zytor.com> in private!
"Unix gives you enough rope to shoot yourself in the foot."
http://www.zytor.com/~hpa/puzzle.txt	<amsp@zytor.com>

Re: Setting up MTRRs for 4096MB RAM

[Tim Walberg]

[-- Attachment #1: Type: text/plain, Size: 486 bytes --]

On 08/09/2001 10:53 -0700, H. Peter Anvin wrote:
>>	
>>	Intel MTRRs have to be a multiple of 2, so you'd need 2 MTRRs if you
>>	wanted to cover 3 GB.  0x80000000 is a multiple of 2; 0xC0000000
>>	isn't, and 0xFFFFFFFF definitely isn't, although 0x100000000 is.

Since when? Seems to me bit 0 of 0xC0000000 is 0, therefore it is
a multiple of two. Perhaps you meant "power of 2" (i.e. only one bit
set in the binary representation)?


			tw


-- 
twalberg@mindspring.com

[-- Attachment #2: Type: application/pgp-signature, Size: 175 bytes --]

Re: Setting up MTRRs for 4096MB RAM

[H. Peter Anvin]

Tim Walberg wrote:
> On 08/09/2001 10:53 -0700, H. Peter Anvin wrote:
> 
>>>	
>>>	Intel MTRRs have to be a multiple of 2, so you'd need 2 MTRRs if you
>>>	wanted to cover 3 GB.  0x80000000 is a multiple of 2; 0xC0000000
>>>	isn't, and 0xFFFFFFFF definitely isn't, although 0x100000000 is.
>>>
> 
> Since when? Seems to me bit 0 of 0xC0000000 is 0, therefore it is
> a multiple of two. Perhaps you meant "power of 2" (i.e. only one bit
> set in the binary representation)?
> 

Yes, power of 2.

	-hpa