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* Re: 2.4.10pre13aa1
@ 2001-09-23  9:46 Manfred Spraul
  2001-09-23 14:32 ` 2.4.10pre13aa1 Andrea Arcangeli
  2001-09-23 18:28 ` 2.4.10pre13aa1 Benjamin LaHaise
  0 siblings, 2 replies; 6+ messages in thread
From: Manfred Spraul @ 2001-09-23  9:46 UTC (permalink / raw)
  To: Benjamin LaHaise, Andrea Arcangeli; +Cc: linux-kernel

 >> with only the dirty bit set?  Does somebody know for sure? I can
 >> imagine the cpu finding the tlb state writeable, and issuing
 >> just a locked bit test and set in the pte without caring to
 >> check if the pte is zero or not.
 >>
 >> If the cpu just set the bit this patch will avoid to lose a shared
 >> mapping update. Otherwise it's a safe noop so I keep it applied
 >> until this issue is sorted out
 >
 >I've tested this on all the machines I could get my hands on, and every
 >single CPU will take a page fault if the pte is not present on dirtying
 >the page.  If people are truely paranoid, then make it a boot time
 > assertion.
 >

I don't think that this is a valid argument:
you are testing on i386 and make design decisions for the architecture
independant part.

I'd prefer ptep_get_and_clear_and_flush(), then the arch part can do
what's needed to get the final pte value. (if a single page is modified,
otherwise the arch can define a suitable mmu_gather)

--
     Manfred




^ permalink raw reply	[flat|nested] 6+ messages in thread
[parent not found: <20010921095721.A725@athlon.random>]

end of thread, other threads:[~2001-09-23 18:28 UTC | newest]

Thread overview: 6+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2001-09-23  9:46 2.4.10pre13aa1 Manfred Spraul
2001-09-23 14:32 ` 2.4.10pre13aa1 Andrea Arcangeli
2001-09-23 18:28 ` 2.4.10pre13aa1 Benjamin LaHaise
     [not found] <20010921095721.A725@athlon.random>
2001-09-21 17:18 ` 2.4.10pre13aa1 Benjamin LaHaise
2001-09-22  7:28   ` 2.4.10pre13aa1 Andrea Arcangeli
2001-09-22 22:39     ` 2.4.10pre13aa1 Benjamin LaHaise

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