From: yodaiken@fsmlabs.com
To: Andrew Morton <akpm@zip.com.au>
Cc: Robert Love <rml@tech9.net>, linux-kernel@vger.kernel.org
Subject: Re: [PATCH] only irq-safe atomic ops
Date: Sat, 23 Feb 2002 04:38:15 -0700 [thread overview]
Message-ID: <20020223043815.B29874@hq.fsmlabs.com> (raw)
In-Reply-To: <3C773C02.93C7753E@zip.com.au>, <1014444810.1003.53.camel@phantasy> <3C773C02.93C7753E@zip.com.au> <1014449389.1003.149.camel@phantasy> <3C774AC8.5E0848A2@zip.com.au>
In-Reply-To: <3C774AC8.5E0848A2@zip.com.au>; from akpm@zip.com.au on Fri, Feb 22, 2002 at 11:54:48PM -0800
On Fri, Feb 22, 2002 at 11:54:48PM -0800, Andrew Morton wrote:
> Robert Love wrote:
> > Thinking about it, you are probably going to be doing this:
> >
> > ++counter[smp_processor_id()];
> >
> > and that is not preempt-safe since the whole operation certainly is not
> > atomic. The current CPU could change between calculating it and
> > referencing the array.
>
> yup. It'd probably work - the compiler should calculate the address and
> do a non-buslocked but IRQ-atomic increment on it. But no way can we
> rely on that happening.
>
> > But, that wouldn't matter as long as you only
> > cared about the sum of the counters.
>
> If the compiler produced code equivalent to
>
> counter[smp_processor_id()] = counter[smp_processor_id()] + 1;
>
> then the counter would get trashed - a context switch could cause CPUB
> to write CPUA's counter (+1) onto CPUB's counter. It's quite possibly
> illegal for the compiler to evaluate the array subscript twice in this
> manner. Dunno.
>
> If the compiler produced code equivalent to:
>
> const int cpu = smp_processor_id();
> counter[cpu] = counter[cpu] + 1;
>
> (which is much more likely) then a context switch would result
> in CPUB writing CPUA's updated counter onto CPUA's counter. Which
> will work a lot more often, until CPUA happens to be updating its
> counter at the same time.
So without preemption in the kernel
maybe 4 instructions: calculate cpuid, inc; all local no cache ping
code is easy to read and understand.
with preemption in the kernel
a design problem. a slippery synchronization issue that
involves the characteristic preemption error - code that works
most of the time.
--
---------------------------------------------------------
Victor Yodaiken
Finite State Machine Labs: The RTLinux Company.
www.fsmlabs.com www.rtlinux.com
next prev parent reply other threads:[~2002-02-23 11:39 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2002-02-23 6:13 [PATCH] only irq-safe atomic ops Robert Love
2002-02-23 6:51 ` Andrew Morton
2002-02-23 7:29 ` Robert Love
2002-02-23 7:54 ` Andrew Morton
2002-02-23 11:38 ` yodaiken [this message]
2002-02-23 18:20 ` Robert Love
2002-02-23 19:06 ` yodaiken
2002-02-23 21:57 ` Roman Zippel
2002-02-23 22:10 ` Andrew Morton
2002-02-23 22:23 ` yodaiken
2002-02-23 22:40 ` Andrew Morton
2002-02-23 22:48 ` yodaiken
2002-02-23 23:13 ` Robert Love
2002-02-23 23:45 ` Robert Love
2002-02-23 23:56 ` Andrew Morton
2002-02-24 1:05 ` yodaiken
2002-02-24 1:08 ` Robert Love
2002-02-23 22:00 ` John Levon
2002-02-23 22:43 ` yodaiken
2002-02-23 20:01 ` Stephen Lord
2002-02-23 20:27 ` Andrew Morton
2002-02-23 9:38 ` Russell King
[not found] <1014444810.1003.53.camel@phantasy.suse.lists.linux.kernel>
[not found] ` <3C773C02.93C7753E@zip.com.au.suse.lists.linux.kernel>
[not found] ` <1014449389.1003.149.camel@phantasy.suse.lists.linux.kernel>
[not found] ` <3C774AC8.5E0848A2@zip.com.au.suse.lists.linux.kernel>
[not found] ` <3C77F503.1060005@sgi.com.suse.lists.linux.kernel>
[not found] ` <3C77FB35.16844FE7@zip.com.au.suse.lists.linux.kernel>
2002-02-23 20:56 ` Andi Kleen
2002-02-23 21:06 ` Andrew Morton
2002-02-23 21:17 ` Stephen Lord
2002-02-23 21:42 ` Andrew Morton
2002-02-23 22:10 ` Stephen Lord
2002-02-23 22:34 ` Andrew Morton
2002-02-23 23:07 ` Mike Fedyk
2002-02-23 23:47 ` Andrew Morton
2002-02-25 13:02 ` Stephen Lord
2002-02-25 13:12 ` Jens Axboe
2002-02-25 13:18 ` Stephen Lord
2002-02-25 19:42 ` Andrew Morton
2002-02-25 19:45 ` Steve Lord
2002-02-25 20:05 ` Andrew Morton
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