Re: Why HZ on i386 is 100 ?

[Andi Kleen <ak@suse.de>]

On Tue, Apr 23, 2002 at 12:24:06PM -0700, george anzinger wrote:
> Andi Kleen wrote:
> > 
> > Alan Cox <alan@lxorguk.ukuu.org.uk> writes:
> > 
> > > > The problem is in accounting (or time slicing if you prefer) where we
> > > > need to start a timer each time a task is context switched to, and stop
> > > > it when the task is switched away.  The overhead is purely in the set up
> > > > and tear down.  MOST of these never expire.
> > >
> > > Done properly on many platforms a variable tick is very very easy and also
> > > very efficient to handle. X86 is a paticular problem case because the timer
> > > is so expensive to fiddle with
> > 
> > Depends. On modern x86 you can either use the local APIC timer or
> > the mmtimers (ftp://download.intel.com/ial/home/sp/mmts097.pdf -
> > should be in newer x86 chipsets). Both should be better than the
> > 8254 timer and are also not expensive to work with.
> 
> I just looked at the mmtimers.  Looks like the right idea but a bit
> overblown.  I would prefer an interrupt generated by a compare to the
> TSC all on board the cpu chip.  This would eliminate the I/O overhead. 

That's the local APIC timer. Pretty much all modern x86 have it.
But at least microsoft warns from using them for high precision 
tim ekeeping on their mmtimer page "due to inaccuracy and 
frequent silicon bugs" (and I guess they have the data for that) 

For scheduling and time accounting it seems to work reasonably though,
even though I've had some problems with inaccuracies (e.g. when you
instrument both 8254 and apic timer and log the TSCs there are sometimes
drifts) 

The linux local APIC timer setup could be probably also improved, for 
example the 16 multiplier is a bit dubious and the calibration does not
look very robust.

> When can we expect to see this in a real cpu?

mmtimers? They are in the chipset, not in the CPU. 
They are in some modern Intel and AMD chipsets already for example and 
Microsoft is pushing them too so I guess they will be soon in all new 
chipsets. 

-Andi