Re: Memory Barrier Definitions

[Rusty Russell <rusty@rustcorp.com.au>]

On Wed, 8 May 2002 10:07:08 -0700
David Mosberger <davidm@napali.hpl.hp.com> wrote:

> The ia64 memory ordering model is quite orthogonal to the one that
> Linux uses (which is based on the Alpha instructions): Linux
> distinguishes between read and write memory barriers.  ia64 uses an
> acquire/release model instead.  An acquire orders all *later* memory
> accesses and a release orders all *earlier* accesses (regardless of
> whether they are reads or writes).  Another difference is that the
> acquire/release semantics is attached to load/store instructions,
> respectively.  This means that in an ideal world, ia64 would rarely
> need to use the memory barrier instruction.

Hmmm... could you explain more?  You're saying that every load is
an "acquire" and every store a "release"?  Or that they can be flagged
that way, but aren't always?

Does this means that an "acquire" means "all accesses after this insn
(in the code stream) must occur after this insn (in time)"?  Does
that only apply to the address that instruction touched, or all?

Confused,
Rusty.
-- 
   there are those who do and those who hang on and you don't see too
   many doers quoting their contemporaries.  -- Larry McVoy