INTEL 845G Chipset IDE Quandry

INTEL 845G Chipset IDE Quandry

[Anthony Spinillo]

I am having trouble enabling DMA on a recently
installed motherboard. (Intel D845GBVL - 845g chipset). I am running a fresh RedHat7.3 install 
and have tried the stock RH kernel, and I'm up to 2.4.19-pre9. I have a CD burner and DVD drive 
attached which operated with DMA on an older 
845 mobo. If I run hdparm -d1 /dev/hd(a or c),
I now get:

HDIO_SET_DMA failed: Operation not permitted

Here is a snippet from dmesg:

ide: Assuming 33MHz system bus speed for PIO modes;
override with idebus=xx
PCI_IDE: unknown IDE controller on PCI bus 00 device
f9, VID=8086, DID=24cb
PCI: Device 00:1f.1 not available because of resource
collisions
PCI_IDE: (ide_setup_pci_device:) Could not enable
device.

Here is some lspci

00:00.0 Host bridge: Intel Corp.: Unknown device 2560 (rev 01)
00:01.0 PCI bridge: Intel Corp.: Unknown device 2561 (rev 01)
00:1d.0 USB Controller: Intel Corp.: Unknown device 24c2 (rev 01)
00:1d.1 USB Controller: Intel Corp.: Unknown device 24c4 (rev 01)
00:1d.2 USB Controller: Intel Corp.: Unknown device 24c7 (rev 01)
00:1e.0 PCI bridge: Intel Corp. 82801BA/CA PCI Bridge (rev 81)
00:1f.0 ISA bridge: Intel Corp.: Unknown device 24c0 (rev 01)
00:1f.1 IDE interface: Intel Corp.: Unknown device 24cb (rev 01)

I followed some recent threads, and tried fixes to similiar problems but I'm still locked out.

Aside from this glitch everything else seems to run fine. Could someone give my a hand? Am I missing something simple, is my bios borked, or do I need a patch to support the newer chipset?

Thanks,

Tony

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Re: INTEL 845G Chipset IDE Quandry

[Alan Cox]

On Sat, 2002-06-01 at 12:03, Anthony Spinillo wrote:
> PCI_IDE: unknown IDE controller on PCI bus 00 device
> f9, VID=8086, DID=24cb
> PCI: Device 00:1f.1 not available because of resource
> collisions
> PCI_IDE: (ide_setup_pci_device:) Could not enable
> device.

If you look with lspci -v you will find your BIOS has mismapped or
forgotten to map some of the control register space for that device.

Alan

Re: INTEL 845G Chipset IDE Quandry

[Andre Hedrick]

I need to add "24cb" to the list of hosts.

On Sat, 1 Jun 2002, Anthony Spinillo wrote:

> I am having trouble enabling DMA on a recently
> installed motherboard. (Intel D845GBVL - 845g chipset). I am running a fresh RedHat7.3 install 
> and have tried the stock RH kernel, and I'm up to 2.4.19-pre9. I have a CD burner and DVD drive 
> attached which operated with DMA on an older 
> 845 mobo. If I run hdparm -d1 /dev/hd(a or c),
> I now get:
> 
> HDIO_SET_DMA failed: Operation not permitted
> 
> Here is a snippet from dmesg:
> 
> ide: Assuming 33MHz system bus speed for PIO modes;
> override with idebus=xx
> PCI_IDE: unknown IDE controller on PCI bus 00 device
> f9, VID=8086, DID=24cb
> PCI: Device 00:1f.1 not available because of resource
> collisions
> PCI_IDE: (ide_setup_pci_device:) Could not enable
> device.
> 
> Here is some lspci
> 
> 00:00.0 Host bridge: Intel Corp.: Unknown device 2560 (rev 01)
> 00:01.0 PCI bridge: Intel Corp.: Unknown device 2561 (rev 01)
> 00:1d.0 USB Controller: Intel Corp.: Unknown device 24c2 (rev 01)
> 00:1d.1 USB Controller: Intel Corp.: Unknown device 24c4 (rev 01)
> 00:1d.2 USB Controller: Intel Corp.: Unknown device 24c7 (rev 01)
> 00:1e.0 PCI bridge: Intel Corp. 82801BA/CA PCI Bridge (rev 81)
> 00:1f.0 ISA bridge: Intel Corp.: Unknown device 24c0 (rev 01)
> 00:1f.1 IDE interface: Intel Corp.: Unknown device 24cb (rev 01)
> 
> I followed some recent threads, and tried fixes to similiar problems but I'm still locked out.
> 
> Aside from this glitch everything else seems to run fine. Could someone give my a hand? Am I missing something simple, is my bios borked, or do I need a patch to support the newer chipset?
> 
> Thanks,
> 
> Tony
> 
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> Get your free email from www.linuxmail.org 
> 
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> 

Andre Hedrick
LAD Storage Consulting Group

Re: INTEL 845G Chipset IDE Quandry

[Andre Hedrick]

Alan,

This is one of the versions of INTEL which has extra bandwidth if you want
wanted to the async IO.  Meaning the device could be set faster than the
host when reading from the host.  However when writing to the host the
device "must" be set to match.  The buffer is not capable of safely
handling the extra push.

So in 2.4 we will properly time the host, unlike 2.5 which has elected to
overdrive the hardware.

The effect is the following.  "LINUS are you listening?"

Ultra DMA 100 uses 4 data clocks to transfer "X" amount of data.
Ultra DMA 133 uses 3 data clocks to transfer "X" amount of data.

So if a bad host trys to push the limits, it ends up missing a data
strobe and the DATA goes away quietly without warning.  NICE!

Maybe now people will understand why 2.5 is falling apart and it is not
Martin's fault.  He is just getting bad information and bad patches.
He actual has nearly the same model I was working on to use fucntion
pointers in the style of "MiniPort (tm)".  I will explain why this is
desired later.

Cheers,

Andre Hedrick
LAD Storage Consulting Group

PS AntonA, my promise to you to inform Linus of one of the major design
flaws of 2.5 is now met.

On 1 Jun 2002, Alan Cox wrote:

> On Sat, 2002-06-01 at 12:03, Anthony Spinillo wrote:
> > PCI_IDE: unknown IDE controller on PCI bus 00 device
> > f9, VID=8086, DID=24cb
> > PCI: Device 00:1f.1 not available because of resource
> > collisions
> > PCI_IDE: (ide_setup_pci_device:) Could not enable
> > device.
> 
> If you look with lspci -v you will find your BIOS has mismapped or
> forgotten to map some of the control register space for that device.
> 
> Alan
> 
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> To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
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Re: INTEL 845G Chipset IDE Quandry

[Anthony Spinillo]

That is a relief. ;) Thanks Andre. 

Tony
> 
> 
> I need to add "24cb" to the list of hosts.
> 
> On Sat, 1 Jun 2002, Anthony Spinillo wrote:
> 
> > I am having trouble enabling DMA on a recently
> > installed motherboard. (Intel D845GBVL - 845g chipset). I am running a fresh RedHat7.3 install 
> > and have tried the stock RH kernel, and I'm up to 2.4.19-pre9. I have a CD burner and DVD drive 
> > attached which operated with DMA on an older 
> > 845 mobo. If I run hdparm -d1 /dev/hd(a or c),
> > I now get:
> > 
> > HDIO_SET_DMA failed: Operation not permitted
> > 
> > Here is a snippet from dmesg:
> > 

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Re: INTEL 845G Chipset IDE Quandry

[Bartlomiej Zolnierkiewicz]

> Alan,
>
> This is one of the versions of INTEL which has extra bandwidth if you
> want
> wanted to the async IO.  Meaning the device could be set faster than the
> host when reading from the host.  However when writing to the host the
> device "must" be set to match.  The buffer is not capable of safely
> handling the extra push.
>
> So in 2.4 we will properly time the host, unlike 2.5 which has elected
> to overdrive the hardware.

Only in piix driver (Intel & Efar) and user have to explicitly compile
support for it, it have nothing to do with kernel version and everything
with driver version.

> The effect is the following.  "LINUS are you listening?"
				 ^^^^^^^^^^^^^^^^^^^^^^^^
Andre, you forgot to cc Linus ;)

> Ultra DMA 100 uses 4 data clocks to transfer "X" amount of data.
> Ultra DMA 133 uses 3 data clocks to transfer "X" amount of data.
>
> So if a bad host trys to push the limits, it ends up missing a data
> strobe and the DATA goes away quietly without warning.  NICE!
>
> Maybe now people will understand why 2.5 is falling apart and it is not
> Martin's fault.  He is just getting bad information and bad patches.

Poor Marcin, he is so misinformed by bad people trying to spoil ATA stuff.

Bad patches? Who is the bad guy making the bad patches?
Let me guess, it is Vojtech removing others people copyrighted "sick
timing tables". Or maybe it is Jens doing at least TCQ?
Or maybe it is me... etc.

> He actual has nearly the same model I was working on to use fucntion

It is really funny... but some people read code and know facts...

> pointers in the style of "MiniPort (tm)".  I will explain why this is
> desired later.

in Q4 I guess

> Cheers,

Greets...

> Andre Hedrick
> LAD Storage Consulting Group
>
> PS AntonA, my promise to you to inform Linus of one of the major design
> flaws of 2.5 is now met.

What a nice FUD.
What is this major design flaw? Experimental (on demand) code in piix
driver? Or you no longer being ATA maintainer?

Ok, I really wanted to be quiet, but this time it is too much...
sorry for bad words/irony but that is how things look like...

Some people (me included) are putting much effort in cleaning/improving
all this mess, and you keep spreading FUD and discrediting them.

--
Bartlomiej

Re: INTEL 845G Chipset IDE Quandry

[Martin Dalecki]

Bartlomiej Zolnierkiewicz wrote:
>>Alan,
>>
>>This is one of the versions of INTEL which has extra bandwidth if you
>>want
>>wanted to the async IO.  Meaning the device could be set faster than the
>>host when reading from the host.  However when writing to the host the
>>device "must" be set to match.  The buffer is not capable of safely
>>handling the extra push.
>>
>>So in 2.4 we will properly time the host, unlike 2.5 which has elected
>>to overdrive the hardware.
> 
> 
> Only in piix driver (Intel & Efar) and user have to explicitly compile
> support for it, it have nothing to do with kernel version and everything
> with driver version.
> 
> 
>>The effect is the following.  "LINUS are you listening?"
> 
> 				 ^^^^^^^^^^^^^^^^^^^^^^^^
> Andre, you forgot to cc Linus ;)
> 
> 
>>Ultra DMA 100 uses 4 data clocks to transfer "X" amount of data.
>>Ultra DMA 133 uses 3 data clocks to transfer "X" amount of data.
>>
>>So if a bad host trys to push the limits, it ends up missing a data
>>strobe and the DATA goes away quietly without warning.  NICE!
>>
>>Maybe now people will understand why 2.5 is falling apart and it is not
>>Martin's fault.  He is just getting bad information and bad patches.
> 
> 
> Poor Marcin, he is so misinformed by bad people trying to spoil ATA stuff.
> 
> Bad patches? Who is the bad guy making the bad patches?
> Let me guess, it is Vojtech removing others people copyrighted "sick
> timing tables". Or maybe it is Jens doing at least TCQ?
> Or maybe it is me... etc.
> 
> 
>>He actual has nearly the same model I was working on to use fucntion
> 
> 
> It is really funny... but some people read code and know facts...
> 
> 
>>pointers in the style of "MiniPort (tm)".  I will explain why this is
>>desired later.
> 
> 
> in Q4 I guess

Of year 2010 - remember learning proper C will take him time.
Becouse I never ever saw any code contributed by him
despite the fact that I'm still open for patches, as
I have told him upon request.
Once exception was a broken patch which even didn't
compile and couldn't solve the problem it was
proclaiming to solve.

Re: INTEL 845G Chipset IDE Quandry

[Anthony Spinillo]

Back to my original problem, will there be a fix before 2010? ;)

Tony


Martin Dalecki wrote:

> Of year 2010 - remember learning proper C will take him time.
> Becouse I never ever saw any code contributed by him
> despite the fact that I'm still open for patches, as
> I have told him upon request.
> Once exception was a broken patch which even didn't
> compile and couldn't solve the problem it was
> proclaiming to solve.
> 
> 

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Re: INTEL 845G Chipset IDE Quandry

[Martin Dalecki]

Anthony Spinillo wrote:
> Back to my original problem, will there be a fix before 2010? ;)

Well since you have already tyred yourself to poke at it.
Well please just go ahead and atd an entry to the table
at the end of piix.c which encompasses the device.
Do it by copying over the next familiar one and I would
be really geald if you could just test whatever this
worked. If yes well please send me just the patch and
I will include it.

> 
> Tony
> 
> 
> Martin Dalecki wrote:
> 
> 
>>Of year 2010 - remember learning proper C will take him time.
>>Becouse I never ever saw any code contributed by him
>>despite the fact that I'm still open for patches, as
>>I have told him upon request.
>>Once exception was a broken patch which even didn't
>>compile and couldn't solve the problem it was
>>proclaiming to solve.
>>
>>
> 
> 



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Re: INTEL 845G Chipset IDE Quandry

[Vojtech Pavlik]

On Sun, Jun 02, 2002 at 09:36:35PM +0200, Martin Dalecki wrote:
> Anthony Spinillo wrote:
> > Back to my original problem, will there be a fix before 2010? ;)
> 
> Well since you have already tyred yourself to poke at it.
> Well please just go ahead and atd an entry to the table
> at the end of piix.c which encompasses the device.
> Do it by copying over the next familiar one and I would
> be really geald if you could just test whatever this
> worked. If yes well please send me just the patch and
> I will include it.

Note it works with 2.5 already. We have the device there.

> 
> > 
> > Tony
> > 
> > 
> > Martin Dalecki wrote:
> > 
> > 
> >>Of year 2010 - remember learning proper C will take him time.
> >>Becouse I never ever saw any code contributed by him
> >>despite the fact that I'm still open for patches, as
> >>I have told him upon request.
> >>Once exception was a broken patch which even didn't
> >>compile and couldn't solve the problem it was
> >>proclaiming to solve.
> >>
> >>
> > 
> > 
> 
> 
> 
> -- 
> - phone: +49 214 8656 283
> - job:   eVision-Ventures AG, LEV .de (MY OPINIONS ARE MY OWN!)
> - langs: de_DE.ISO8859-1, en_US, pl_PL.ISO8859-2, last ressort: ru_RU.KOI8-R
> 
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SuSE Labs

Re: INTEL 845G Chipset IDE Quandry

[Anthony Spinillo]

I fired up 2519 as a test, same resource collision problem.

Tony

----- Original Message -----
From: Alan Cox <alan@lxorguk.ukuu.org.uk>
Date: 	03 Jun 2002 02:13:45 +0100
To: Vojtech Pavlik <vojtech@suse.cz>
Subject: Re: INTEL 845G Chipset IDE Quandry


> On Sun, 2002-06-02 at 22:30, Vojtech Pavlik wrote:
> > On Sun, Jun 02, 2002 at 09:36:35PM +0200, Martin Dalecki wrote:
> > > Anthony Spinillo wrote:
> > > > Back to my original problem, will there be a fix before 2010? ;)
> > > 
> > > Well since you have already tyred yourself to poke at it.
> > > Well please just go ahead and atd an entry to the table
> > > at the end of piix.c which encompasses the device.
> > > Do it by copying over the next familiar one and I would
> > > be really geald if you could just test whatever this
> > > worked. If yes well please send me just the patch and
> > > I will include it.
> > 
> > Note it works with 2.5 already. We have the device there.
> 
> If you look at why it fails it fails not because it isnt in the table
> but because the PCI device has not been allocated resources properly by
> the BIOS
> 
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> 
> 

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Re: INTEL 845G Chipset IDE Quandry

[Alan Cox]

On Sun, 2002-06-02 at 22:30, Vojtech Pavlik wrote:
> On Sun, Jun 02, 2002 at 09:36:35PM +0200, Martin Dalecki wrote:
> > Anthony Spinillo wrote:
> > > Back to my original problem, will there be a fix before 2010? ;)
> > 
> > Well since you have already tyred yourself to poke at it.
> > Well please just go ahead and atd an entry to the table
> > at the end of piix.c which encompasses the device.
> > Do it by copying over the next familiar one and I would
> > be really geald if you could just test whatever this
> > worked. If yes well please send me just the patch and
> > I will include it.
> 
> Note it works with 2.5 already. We have the device there.

If you look at why it fails it fails not because it isnt in the table
but because the PCI device has not been allocated resources properly by
the BIOS

Re: INTEL 845G Chipset IDE Quandry

[Martin Dalecki]

Vojtech Pavlik wrote:
> On Sun, Jun 02, 2002 at 09:36:35PM +0200, Martin Dalecki wrote:
> 
>>Anthony Spinillo wrote:
>>
>>>Back to my original problem, will there be a fix before 2010? ;)
>>
>>Well since you have already tyred yourself to poke at it.
>>Well please just go ahead and atd an entry to the table
>>at the end of piix.c which encompasses the device.
>>Do it by copying over the next familiar one and I would
>>be really geald if you could just test whatever this
>>worked. If yes well please send me just the patch and
>>I will include it.
> 
> 
> Note it works with 2.5 already. We have the device there.


Yes after looking it up I realized it's already there.

Re: INTEL 845G Chipset IDE Quandry

[Martin Dalecki]

Vojtech Pavlik wrote:
> On Mon, Jun 03, 2002 at 06:46:24AM +0200, Martin Dalecki wrote:
> 
>>Vojtech Pavlik wrote:
>>
>>>On Sun, Jun 02, 2002 at 09:36:35PM +0200, Martin Dalecki wrote:
>>>
>>>
>>>>Anthony Spinillo wrote:
>>>>
>>>>
>>>>>Back to my original problem, will there be a fix before 2010? ;)
>>>>
>>>>Well since you have already tyred yourself to poke at it.
>>>>Well please just go ahead and atd an entry to the table
>>>>at the end of piix.c which encompasses the device.
>>>>Do it by copying over the next familiar one and I would
>>>>be really geald if you could just test whatever this
>>>>worked. If yes well please send me just the patch and
>>>>I will include it.
>>>
>>>
>>>Note it works with 2.5 already. We have the device there.
>>
>>Yes after looking it up I realized it's already there.
> 
> 
> But as Alan pointer out, in 2.4 the missing PCI ID isn't the problem -
> it would work with no tuning without it, but the fact the on-board BIOS
> incorrectly assigns io-ranges to the PCI device is a problem we may have
> on 2.5 as well.


Well I don't know that much about the ever changing PCI/ACPI support
in kernel - the only thing I could imagine
would be that we sanitize the handling of it at the generic
"chipset quirk handling" there. Right during the "bios table
scan" time... (I mean drivers/pci/quirks.c)

The following function there looks like the right tool for this
purpose:

static void __init quirk_io_region(struct pci_dev *dev, unsigned region, 
unsigned size, int nr)

Well after looking closer I'm convinced that this is
the right place... will you have a look at this plase...
I'm more then busy enbough with other things right now.

Re: INTEL 845G Chipset IDE Quandry

[Vojtech Pavlik]

On Mon, Jun 03, 2002 at 02:13:45AM +0100, Alan Cox wrote:
> On Sun, 2002-06-02 at 22:30, Vojtech Pavlik wrote:
> > On Sun, Jun 02, 2002 at 09:36:35PM +0200, Martin Dalecki wrote:
> > > Anthony Spinillo wrote:
> > > > Back to my original problem, will there be a fix before 2010? ;)
> > > 
> > > Well since you have already tyred yourself to poke at it.
> > > Well please just go ahead and atd an entry to the table
> > > at the end of piix.c which encompasses the device.
> > > Do it by copying over the next familiar one and I would
> > > be really geald if you could just test whatever this
> > > worked. If yes well please send me just the patch and
> > > I will include it.
> > 
> > Note it works with 2.5 already. We have the device there.
> 
> If you look at why it fails it fails not because it isnt in the table
> but because the PCI device has not been allocated resources properly by
> the BIOS

That's right. Well, maybe kernel 2.5 PCI code can fix that better? Maybe
not, and in that case a BIOS upgrade is probably the way to go.

-- 
Vojtech Pavlik
SuSE Labs

Re: INTEL 845G Chipset IDE Quandry

[Vojtech Pavlik]

On Mon, Jun 03, 2002 at 06:46:24AM +0200, Martin Dalecki wrote:
> Vojtech Pavlik wrote:
> > On Sun, Jun 02, 2002 at 09:36:35PM +0200, Martin Dalecki wrote:
> > 
> >>Anthony Spinillo wrote:
> >>
> >>>Back to my original problem, will there be a fix before 2010? ;)
> >>
> >>Well since you have already tyred yourself to poke at it.
> >>Well please just go ahead and atd an entry to the table
> >>at the end of piix.c which encompasses the device.
> >>Do it by copying over the next familiar one and I would
> >>be really geald if you could just test whatever this
> >>worked. If yes well please send me just the patch and
> >>I will include it.
> > 
> > 
> > Note it works with 2.5 already. We have the device there.
> 
> Yes after looking it up I realized it's already there.

But as Alan pointer out, in 2.4 the missing PCI ID isn't the problem -
it would work with no tuning without it, but the fact the on-board BIOS
incorrectly assigns io-ranges to the PCI device is a problem we may have
on 2.5 as well.

-- 
Vojtech Pavlik
SuSE Labs

Re: INTEL 845G Chipset IDE Quandry

[Andre Hedrick]

On Sun, 2 Jun 2002, Martin Dalecki wrote:

> Of year 2010 - remember learning proper C will take him time.
> Becouse I never ever saw any code contributed by him
> despite the fact that I'm still open for patches, as
> I have told him upon request.
> Once exception was a broken patch which even didn't
> compile and couldn't solve the problem it was
> proclaiming to solve.

There is a difference.  I can pay a code monkey to write clean code.
Can you pay somebody to make the driver work?
Obviously you still can not read state diagrams even after I invited you
to IRC and walked you through the documents and explaining how there are
different events described in each.  I then explain the difference of how
there are two ways to enter each one.

Then you tell me you have a grand idea for a unified interrupt handler,
which guesses what the operation to be completed by reading the command
register.  But it is only command on a write, it is status on a read,
since an interrupt happened the command opcode is gone.  NICE.

Then you toss out the next one.  Gee, I can stall device interrupts to the
interface if a toggle the eIEN line on and off.  Now where you planning to
do this between DMA interrupts if you had more than one PRD?  I never
dreamed of such a brilliant idea, but you forgot one thing.  NO touching
the taskfile registers until you stop DMAing.  Either abort the
transaction of deadlock the interface.

Now I will go learn proper C, and you have all the time you need to try
get the data-transport layer right.

As for that patch I sent you, it works but you did not try.  See after I
sent it to you on a short test compile, I ran tests on it the next day.

Lastly, I started to make a new one, but since there is no way to
determine what the entry mode of the driver upon command block execution.

Regards ...

Andre Hedrick
LAD Storage Consulting Group

Re: INTEL 845G Chipset IDE Quandry

[Vojtech Pavlik]

On Mon, Jun 03, 2002 at 09:04:12AM +0800, Anthony Spinillo wrote:

> I fired up 2519 as a test, same resource collision problem.

In that case, probably only a BIOS upgrade (if there is one available)
can help.

> 
> Tony
> 
> ----- Original Message -----
> From: Alan Cox <alan@lxorguk.ukuu.org.uk>
> Date: 	03 Jun 2002 02:13:45 +0100
> To: Vojtech Pavlik <vojtech@suse.cz>
> Subject: Re: INTEL 845G Chipset IDE Quandry
> 
> 
> > On Sun, 2002-06-02 at 22:30, Vojtech Pavlik wrote:
> > > On Sun, Jun 02, 2002 at 09:36:35PM +0200, Martin Dalecki wrote:
> > > > Anthony Spinillo wrote:
> > > > > Back to my original problem, will there be a fix before 2010? ;)
> > > > 
> > > > Well since you have already tyred yourself to poke at it.
> > > > Well please just go ahead and atd an entry to the table
> > > > at the end of piix.c which encompasses the device.
> > > > Do it by copying over the next familiar one and I would
> > > > be really geald if you could just test whatever this
> > > > worked. If yes well please send me just the patch and
> > > > I will include it.
> > > 
> > > Note it works with 2.5 already. We have the device there.
> > 
> > If you look at why it fails it fails not because it isnt in the table
> > but because the PCI device has not been allocated resources properly by
> > the BIOS
> > 
> > -
> > To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
> > the body of a message to majordomo@vger.kernel.org
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-- 
Vojtech Pavlik
SuSE Labs

Re: INTEL 845G Chipset IDE Quandry

[Martin Dalecki]

Vojtech Pavlik wrote:

> The PCI code under normal circumstances can fix the allocation problems
> by itself (without any special quirks code), but in this case it simply
> fails. Do you still have the original e-mail with the dmesg? I'd like to
> look at that again ...

No becouse It wasn't directed at me.

Re: INTEL 845G Chipset IDE Quandry

[Vojtech Pavlik]

On Mon, Jun 03, 2002 at 10:04:46AM +0200, Martin Dalecki wrote:

> Well I don't know that much about the ever changing PCI/ACPI support
> in kernel - the only thing I could imagine
> would be that we sanitize the handling of it at the generic
> "chipset quirk handling" there. Right during the "bios table
> scan" time... (I mean drivers/pci/quirks.c)
> 
> The following function there looks like the right tool for this
> purpose:
> 
> static void __init quirk_io_region(struct pci_dev *dev, unsigned region, 
> unsigned size, int nr)
> 
> Well after looking closer I'm convinced that this is
> the right place... will you have a look at this plase...
> I'm more then busy enbough with other things right now.

The PCI code under normal circumstances can fix the allocation problems
by itself (without any special quirks code), but in this case it simply
fails. Do you still have the original e-mail with the dmesg? I'd like to
look at that again ...

-- 
Vojtech Pavlik
SuSE Labs

Re: INTEL 845G Chipset IDE Quandry

[Andre Hedrick]

Kjartan,

Please do not confuse them, they have a hard enough time reading.
The docs state it can only do X, but lets overclock it and do X+1.
Maybe the hardware is smart and knows which drivers are safe and sane.

Anthony, I sent you a mini-patch to add the 845G to the sane driver.
It will work, as Kjartan has stated.  His system suffered the exact same
events.

Cheers,

Andre Hedrick
LAD Storage Consulting Group


On 3 Jun 2002, Kjartan Maraas wrote:

> man, 2002-06-03 kl. 03:13 skrev Alan Cox:
> > On Sun, 2002-06-02 at 22:30, Vojtech Pavlik wrote:
> > > On Sun, Jun 02, 2002 at 09:36:35PM +0200, Martin Dalecki wrote:
> 
> [SNIP]
> 
> > > Note it works with 2.5 already. We have the device there.
> > 
> > If you look at why it fails it fails not because it isnt in the table
> > but because the PCI device has not been allocated resources properly by
> > the BIOS
> > 
> 
> Back when I talked to Andre about this problem it sounded to me like he
> said it was a genuine bug that was fixed in the ide-convert patches.
> Maybe I'm confusing two issues here...

Re: INTEL 845G Chipset IDE Quandry

[Kjartan Maraas]

man, 2002-06-03 kl. 03:13 skrev Alan Cox:
> On Sun, 2002-06-02 at 22:30, Vojtech Pavlik wrote:
> > On Sun, Jun 02, 2002 at 09:36:35PM +0200, Martin Dalecki wrote:

[SNIP]

> > Note it works with 2.5 already. We have the device there.
> 
> If you look at why it fails it fails not because it isnt in the table
> but because the PCI device has not been allocated resources properly by
> the BIOS
> 

Back when I talked to Andre about this problem it sounded to me like he
said it was a genuine bug that was fixed in the ide-convert patches.
Maybe I'm confusing two issues here...

Cheers
Kjartan

Re: INTEL 845G Chipset IDE Quandry

[Anthony Spinillo]

[-- Attachment #1: Type: text/plain, Size: 474 bytes --]

I just tried Andre's patch. I applied it on top of 2.4.19pre9-ac3.(Patch attached below.) It pulled me up to DMA. I tested by setting hdparm -d1 /dev/hdc
(my DVD drive) and played a DVD with Xine. It played great!

I do not have an IDE hard drive to test, since my HD is SCSI.

I will try Vojtech's patch next, and report in.

Thanks for all your help! (Andre, Vojtech, JeffN and everyone else.)

Tony


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[-- Attachment #2: andre.patch --]
[-- Type: application/octet-stream, Size: 3611 bytes --]

diff -urN linux-2.4.19-p9-ac3-pristine/drivers/ide/ide-pci.c
linux-2.4.19-p9-ac3/drivers/ide/ide-pci.c
--- linux-2.4.19-p9-ac3-pristine/drivers/ide/ide-pci.c	Sun Jun  2
16:49:06 2002
+++ linux-2.4.19-p9-ac3/drivers/ide/ide-pci.c	Sun Jun  2 20:52:49 2002
@@ -47,6 +47,7 @@
 #define DEVID_PIIX4U5	((ide_pci_devid_t){PCI_VENDOR_ID_INTEL,  PCI_DEVICE_ID_INTEL_82801CA_10})
 #define DEVID_PIIX4U6	((ide_pci_devid_t){PCI_VENDOR_ID_INTEL,  PCI_DEVICE_ID_INTEL_82801CA_11})
 #define DEVID_PIIX4U7	((ide_pci_devid_t){PCI_VENDOR_ID_INTEL,  PCI_DEVICE_ID_INTEL_82801E_11})
+#define DEVID_PIIX4U8	((ide_pci_devid_t){PCI_VENDOR_ID_INTEL,  PCI_DEVICE_ID_INTEL_82801DB_11})
 #define DEVID_VIA_IDE	((ide_pci_devid_t){PCI_VENDOR_ID_VIA,	 PCI_DEVICE_ID_VIA_82C561})
 #define DEVID_MR_IDE	((ide_pci_devid_t){PCI_VENDOR_ID_VIA,	 PCI_DEVICE_ID_VIA_82C576_1})
 #define DEVID_VP_IDE	((ide_pci_devid_t){PCI_VENDOR_ID_VIA,	 PCI_DEVICE_ID_VIA_82C586_1})
@@ -438,6 +439,7 @@
	{DEVID_PIIX4U5, "PIIX4",	FIXUP_PIIX,	PCI_PIIX,    ATA66_PIIX,	  INIT_PIIX,	  NULL, 	  {{0x41,0x80,0x80},{0x43,0x80,0x80}},   ON_BOARD,	     0 },
	{DEVID_PIIX4U6, "PIIX4",	FIXUP_PIIX,	PCI_PIIX,    ATA66_PIIX,	  INIT_PIIX,	  NULL, 	  {{0x41,0x80,0x80},{0x43,0x80,0x80}},   ON_BOARD,	     0 },
	{DEVID_PIIX4U7, "PIIX4",	FIXUP_PIIX,	PCI_PIIX,    ATA66_PIIX,	  INIT_PIIX,	  NULL, 	  {{0x41,0x80,0x80},{0x43,0x80,0x80}},   ON_BOARD,	     0 },
+	{DEVID_PIIX4U8, "PIIX4",	FIXUP_PIIX,	PCI_PIIX,    ATA66_PIIX,	  INIT_PIIX,	  NULL, 	  {{0x41,0x80,0x80},{0x43,0x80,0x80}},   ON_BOARD,	     0 },
	{DEVID_VIA_IDE, "VIA_IDE",	NULL,		NULL,	     NULL, 	  NULL, 	  NULL, 	  {{0x00,0x00,0x00},{0x00,0x00,0x00}},   ON_BOARD,	     0 },
	{DEVID_MR_IDE,	"VP_IDE",	NULL,	       PCI_VIA82CXXX,	ATA66_VIA82CXXX,INIT_VIA82CXXX, DMA_VIA82CXXX, {{0x40,0x02,0x02}, {0x40,0x01,0x01}},	ON_BOARD,	0 },
	{DEVID_VP_IDE,	"VP_IDE",	NULL,	       PCI_VIA82CXXX,	ATA66_VIA82CXXX,INIT_VIA82CXXX, DMA_VIA82CXXX, {{0x40,0x02,0x02}, {0x40,0x01,0x01}},	ON_BOARD,	0 },
diff -urN linux-2.4.19-p9-ac3-pristine/drivers/ide/piix.c
linux-2.4.19-p9-ac3/drivers/ide/piix.c
--- linux-2.4.19-p9-ac3-pristine/drivers/ide/piix.c	Sun Jun  2
16:49:06 2002
+++ linux-2.4.19-p9-ac3/drivers/ide/piix.c	Sun Jun  2 20:36:23 2002
@@ -94,6 +94,7 @@
 		case PCI_DEVICE_ID_INTEL_82801CA_10:
 		case PCI_DEVICE_ID_INTEL_82801CA_11:
 		case PCI_DEVICE_ID_INTEL_82801E_11:
+		case PCI_DEVICE_ID_INTEL_82801DB_11:
 			p += sprintf(p, "Intel PIIX4 Ultra 100 Chipset.\n");
 			break;
 		case PCI_DEVICE_ID_INTEL_82372FB_1:
@@ -216,6 +217,7 @@
 		case PCI_DEVICE_ID_INTEL_82801CA_10:
 		case PCI_DEVICE_ID_INTEL_82801CA_11:
 		case PCI_DEVICE_ID_INTEL_82801E_11:
+		case PCI_DEVICE_ID_INTEL_82801DB_11:
 			mode |= 0x03;
 			break;
 		case PCI_DEVICE_ID_INTEL_82801AA_1:
@@ -534,6 +536,7 @@
 		case PCI_DEVICE_ID_INTEL_82801CA_10:
 		case PCI_DEVICE_ID_INTEL_82801CA_11:
 		case PCI_DEVICE_ID_INTEL_82801E_11:
+		case PCI_DEVICE_ID_INTEL_82801DB_11:
 		{
 			unsigned int extra = 0;
 			pci_read_config_dword(dev, 0x54, &extra);
diff -urN linux-2.4.19-p9-ac3-pristine/include/linux/pci_ids.h
linux-2.4.19-p9-ac3/include/linux/pci_ids.h
--- linux-2.4.19-p9-ac3-pristine/include/linux/pci_ids.h	Sun
Jun  2 16:49:17 2002
+++ linux-2.4.19-p9-ac3/include/linux/pci_ids.h Sun Jun  2 20:53:53
2002
@@ -1685,6 +1685,7 @@
 #define PCI_DEVICE_ID_INTEL_82801CA_10	0x248a
 #define PCI_DEVICE_ID_INTEL_82801CA_11	0x248b
 #define PCI_DEVICE_ID_INTEL_82801CA_12	0x248c
+#define PCI_DEVICE_ID_INTEL_82801DB_11	0x24cb
 #define PCI_DEVICE_ID_INTEL_80310	0x530d
 #define PCI_DEVICE_ID_INTEL_82810_MC1	0x7120
 #define PCI_DEVICE_ID_INTEL_82810_IG1	0x7121