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From: John Levon <levon@movementarian.org>
To: Zwane Mwaikambo <zwane@holomorphy.com>
Cc: Dipankar Sarma <dipankar@in.ibm.com>,
	Corey Minyard <cminyard@mvista.com>,
	Linus Torvalds <torvalds@transmeta.com>,
	"Heater, Daniel (IndSys, GEFanuc,
	VMIC)" <Daniel.Heater@gefanuc.com>,
	linux-kernel@vger.kernel.org
Subject: Re: NMI handling rework for x86
Date: Fri, 15 Nov 2002 17:41:22 +0000	[thread overview]
Message-ID: <20021115174122.GA83229@compsoc.man.ac.uk> (raw)
In-Reply-To: <Pine.LNX.4.44.0211150307240.2750-100000@montezuma.mastecende.com>

On Fri, Nov 15, 2002 at 03:18:22AM -0500, Zwane Mwaikambo wrote:

> > Once you remove a handler from the list, any subsequent NMI is *not*
> > going to see the handler. So even if another CPU is executing the same
> > handler, if you wait for the RCU callback, you can guarantee that
> > no-one is executing the deleted handler. RCU will wait for all the
> > CPUs to context switch or execute user-level code atleast once.
> 
> I think you're confusing NMI handling, they aren't like your normal 
> interrupts. You're not going to see that context switch.

The dangerous part is when a particular NMI interrupt is holding a
reference to the removed item on the list. Now, after *every* CPU has
been through a normal schedule, none of them can still be running /that
particular/ NMI interrupt: the fact they can be running other NMIs
constantly is neither here nor there, as newly generated NMIs can't see
the deleted element anyway.

> > Corey's code doesn't rely on completion() to ensure this, it relies
> > on RCU to make sure that nobody is running the handler. The key is
> > that once the pointers between the prev and the next of the deleted
> 
> Can you change prev and next atomically?

As long as they're naturally aligned.

> > NMI handler are set, subsequent NMIs aren't going to see that handler.
> > context switch/user-level means that CPU must have exited any
> > NMI handler it may have been executing at the time of deletion.
> 
> Again, are you mistaking this for a normal interrupt?

Zwane you're going to have describe a race if you think you can see one
- neither I nor Dipankar follow your point

> At a fair interrupt rate i'd rather have that fill my caches, less time 
> spent in the NMI handler means more overall system time.

-EPARSE. You will spend more time in the NMI handlers bouncing the line
across. 

regards
john
-- 
Khendon's Law: If the same point is made twice by the same person,
the thread is over.

  parent reply	other threads:[~2002-11-15 17:34 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2002-11-15  4:30 NMI handling rework for x86 Corey Minyard
2002-11-15  4:40 ` Zwane Mwaikambo
2002-11-15  6:10   ` Dipankar Sarma
2002-11-15  7:40     ` Zwane Mwaikambo
2002-11-15  8:13       ` Dipankar Sarma
2002-11-15  8:18         ` Zwane Mwaikambo
2002-11-15  8:50           ` Dipankar Sarma
2002-11-15 17:41           ` John Levon [this message]
2002-11-15 22:46             ` Zwane Mwaikambo
2002-11-15  5:12 ` John Levon
2002-11-15  5:19   ` John Levon
2002-11-15 14:13   ` Corey Minyard
2002-11-15 17:48     ` John Levon
2002-11-15 19:00       ` Corey Minyard
2002-11-15 19:28         ` John Levon
2002-11-15 19:35           ` Corey Minyard
2002-11-17  2:00         ` John Levon
2002-11-17  2:31           ` Zwane Mwaikambo
2002-11-18 16:48             ` Corey Minyard
2002-11-18 15:34           ` Corey Minyard
2002-11-15  5:20 ` Randy.Dunlap
2002-11-15  9:50 ` Mikael Pettersson

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