From: Anton Blanchard <anton@samba.org>
To: David Brownell <david-b@pacbell.net>
Cc: Jeff Garzik <jgarzik@pobox.com>, linux-kernel@vger.kernel.org
Subject: Re: pci_set_mwi() ... why isn't it used more?
Date: Fri, 31 Jan 2003 00:52:15 +1100 [thread overview]
Message-ID: <20030130135215.GF6028@krispykreme> (raw)
In-Reply-To: <3E2C4FFA.1050603@pacbell.net>
> I suppose the potential for broken PCI devices is exactly why MWI
> isn't automatically enabled when DMA mastering is enabled, though
> I don't understand why the cacheline size doesn't get fixed then
> (unless it's that same issue). Devices can use the cacheline size
> to get better Memory Read Line/Read Multiple" throughput; setting
> it shouldn't be tied exclusively to enabling MWI.
There are a number of cases where we cant enable MWI either because
the PCI card doesnt support the CPU cacheline size or we have to set the
PCI card cacheline size to something smaller due to various bugs.
eg I understand earlier versions of the e100 dont support a 128 byte
cacheline (and the top bits are read only so setting it up for 128 bytes
will result in it it being set to 0). Not good for read multiple/line
and even worse if we decide to enable MWI :)
Anton
next prev parent reply other threads:[~2003-01-30 13:44 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2003-01-20 18:41 pci_set_mwi() ... why isn't it used more? David Brownell
2003-01-20 19:00 ` Jeff Garzik
2003-01-20 19:37 ` David Brownell
2003-01-30 13:52 ` Anton Blanchard [this message]
2003-01-30 16:25 ` David Brownell
2003-01-30 16:59 ` Ivan Kokshaysky
2003-01-30 18:35 ` David Brownell
2003-01-30 23:34 ` Ivan Kokshaysky
2003-01-31 0:11 ` Jeff Garzik
2003-01-31 0:51 ` David Brownell
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