From: Andi Kleen <ak@muc.de>
To: Dave Jones <davej@codemonkey.org.uk>, Andi Kleen <ak@muc.de>,
Ivan Kokshaysky <ink@jurassic.park.msu.ru>,
linux-kernel@vger.kernel.org
Subject: Re: cacheline size detection code in 2.5.66
Date: Tue, 25 Mar 2003 14:35:25 +0100 [thread overview]
Message-ID: <20030325133525.GA30321@averell> (raw)
In-Reply-To: <20030325124333.GB28451@suse.de>
> > Broken in i386 too.
>
> I don't see anything broken there. The K7 / K8 feature flags are not
> bit for bit compatible though iirc (can't find my K8 cpuid manuals right now).
Umm - they should be. Otherwise CPUID would be completely useless.
I double checked both the Intel and the x86-64 manual now and bit 19
of 0000_0001 is CLFLUSH
So cpufeature.h and the x86-64 test is correct
0000_0001 is supposed to be globally compatible. 8000_0001
is supposed to be compatible inside AMD CPUs (and 19 is reserved here)
Ivan confused me. Either he read the application note wrong or it is wrong.
-Andi
next prev parent reply other threads:[~2003-03-25 13:24 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2003-03-25 7:15 cacheline size detection code in 2.5.66 Andi Kleen
2003-03-25 11:33 ` Ivan Kokshaysky
2003-03-25 12:15 ` Andi Kleen
2003-03-25 12:43 ` Dave Jones
2003-03-25 13:35 ` Andi Kleen [this message]
2003-03-25 14:39 ` Ivan Kokshaysky
2003-03-25 16:43 ` Dave Jones
2003-03-25 11:52 ` Dave Jones
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