Re: [PATCH] Runtime memory barrier patching

[Andi Kleen <ak@muc.de>]

On Tue, Apr 22, 2003 at 10:43:58AM +0200, Arjan van de Ven wrote:
> On Tue, 2003-04-22 at 01:23, Linux Kernel Mailing List wrote:
> > ChangeSet 1.1169, 2003/04/21 16:23:20-07:00, ak@muc.de
> > 
> > 	[PATCH] Runtime memory barrier patching
> > 	
> > 	This implements automatic code patching of memory barriers based
> > 	on the CPU capabilities. Normally lock ; addl $0,(%esp) barriers
> > 	are used, but these are a bit slow on the Pentium 4.
> > 	
> 
> very nice. Question: would it be doable use this for prefetch() as well?
> Eg default to a non-prefetch kernel and patch in the proper prefetch
> instruction for the current cpu ? (eg AMD prefetch vs Intel one etc etc)

Yes, I already implemented it, but have yet to boot it.

You only need Intel and AMD prefetch. For all Athlons the SSE prefetches
work (because we force the SSE MSR bit to on). prefetchw is 3dnow.
3dnow non 'w' prefetches would only make sense on the K6, but they're
not really worth it there because it doesn't have enough oustanding loads
in the memory unit and worse prefetch is microcoded there.

-Andi