backport AMD K7 MCE changes.

backport AMD K7 MCE changes.

[Dave Jones]

We're still accessing MCE bank 0 on Athlons in 2.4 when we shouldn't.
(We don't enable it, but we still check it in the exception handler)
This is fixed differently in 2.6, but is a minimal change
to reproduce the same effect.

		Dave

--- linux-2.4.22/arch/i386/kernel/bluesmoke.c~	2003-10-03 21:47:11.000000000 +0100
+++ linux-2.4.22/arch/i386/kernel/bluesmoke.c	2003-10-03 21:49:55.000000000 +0100
@@ -16,6 +16,7 @@
  */
 
 static int banks;
+static int startbank;
 
 static void intel_machine_check(struct pt_regs * regs, long error_code)
 {
@@ -30,7 +31,7 @@
 
 	printk(KERN_EMERG "CPU %d: Machine Check Exception: %08x%08x\n", smp_processor_id(), mcgsth, mcgstl);
 	
-	for(i=0;i<banks;i++)
+	for(i=startbank;i<banks;i++)
 	{
 		rdmsr(MSR_IA32_MC0_STATUS+i*4,low, high);
 		if(high&(1<<31))
@@ -219,10 +220,13 @@
 	{
 		case X86_VENDOR_AMD:
 			/*
-			 *	AMD K7 machine check is Intel like
+			 *	AMD K7/K8 machine check is Intel like.
 			 */
-			if(c->x86 == 6 || c->x86 == 15)
+			
+			if(c->x86 == 6 || c->x86 == 15) {
+				startbank = 1;
 				intel_mcheck_init(c);
+			}
 			break;
 		case X86_VENDOR_INTEL:
 			intel_mcheck_init(c);

-- 
 Dave Jones     http://www.codemonkey.org.uk

Re: backport AMD K7 MCE changes.

[Andi Kleen]

Dave Jones <davej@redhat.com> writes:
>  			 */
> -			if(c->x86 == 6 || c->x86 == 15)
> +			
> +			if(c->x86 == 6 || c->x86 == 15) {
> +				startbank = 1;

Can you please add comments to such magic changes ?

I still think we should not do anything without an official errata.

The K7 actually has two MCE enable registers: a mask that is only
supposed to be programmed by the BIOS and works around bugs and the
standardized IA32 register controlled by the OS. I suspect your case
only happens with some buggy BIOS that doesn't program the shadow mask
correctly. This would imply that it would make more sense to test it
and program it correctly based on a known good value.

-Andi