From: Christoph Hellwig <hch@infradead.org>
To: Leonid Grossman <leonid.grossman@s2io.com>
Cc: "'Grant Grundler'" <grundler@parisc-linux.org>,
"'Jesse Barnes'" <jbarnes@sgi.com>,
linux-kernel@vger.kernel.org, jeremy@sgi.com,
"'Matthew Wilcox'" <willy@debian.org>,
linux-pci@atrey.karlin.mff.cuni.cz, Jame.Bottomley@steeleye.com
Subject: Re: [RFC] Relaxed PIO read vs. DMA write ordering
Date: Thu, 8 Jan 2004 17:54:22 +0000 [thread overview]
Message-ID: <20040108175422.A13247@infradead.org> (raw)
In-Reply-To: <005b01c3d603$d01b6c90$0400a8c0@S2IOtech.com>; from leonid.grossman@s2io.com on Thu, Jan 08, 2004 at 08:23:49AM -0800
On Thu, Jan 08, 2004 at 08:23:49AM -0800, Leonid Grossman wrote:
> Yes, this is exactly how (at least our 10GbE) PCI-X ASICs work.
> If the RO bit is set, the device decides whether the transaction
> requires strong ordering,
> and sets RO attribute accordingly.
Do you have a pointer to the driver source? This would probably
make a good reference driver for Jesse's suggestion.
next prev parent reply other threads:[~2004-01-08 17:54 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2004-01-07 17:58 [RFC] Relaxed PIO read vs. DMA write ordering Jesse Barnes
2004-01-07 19:02 ` Matthew Wilcox
2004-01-07 22:21 ` Grant Grundler
2004-01-07 23:07 ` Jesse Barnes
2004-01-07 23:27 ` Greg KH
2004-01-07 23:56 ` Jesse Barnes
2004-01-08 0:34 ` Jesse Barnes
2004-01-08 0:08 ` Jeremy Higdon
2004-01-08 10:01 ` Jes Sorensen
2004-01-08 6:38 ` Grant Grundler
2004-01-08 16:23 ` Leonid Grossman
2004-01-08 17:39 ` Jesse Barnes
2004-01-08 17:54 ` Christoph Hellwig [this message]
2004-01-08 19:48 ` Leonid Grossman
2004-01-08 17:36 ` Jesse Barnes
2004-01-08 18:44 ` Grant Grundler
2004-01-09 7:13 ` Jeremy Higdon
2004-01-09 19:51 ` Jesse Barnes
2004-01-09 23:15 ` Jesse Barnes
2004-01-09 20:02 ` Grant Grundler
2004-01-11 14:34 ` James Bottomley
2004-01-09 7:39 ` Jochen Friedrich
2004-01-09 20:27 ` Grant Grundler
2004-01-09 22:12 ` Ivan Kokshaysky
2004-01-07 22:58 ` Jesse Barnes
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