From: Anton Blanchard <anton@samba.org>
To: Chris Friesen <cfriesen@nortelnetworks.com>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>,
Linux Kernel list <linux-kernel@vger.kernel.org>,
Tom Rini <trini@kernel.crashing.org>
Subject: Re: problem with cache flush routine for G5?
Date: Sat, 6 Mar 2004 13:31:50 +1100 [thread overview]
Message-ID: <20040306023150.GK5801@krispykreme> (raw)
In-Reply-To: <4048B720.4010403@nortelnetworks.com>
> After doing some digging in the 970fx specs, it seems that we may not
> need to explicitly force a store of the L1 dcache at all. According to
> the docs, the L1 dcache is unconditionally store-through. Thus, for a
> brute-force implementation we should be able to just invalidate the
> whole icache, do the appropriate sync/isync, and it should pick up the
> changed instructions from the L2 cache. Do you see any problems with
> this? Do I actually still need the store?
Yeah you will get away with it on the 970FX, do the sync before and
isync afterwards. As you suggest, you really should modify it to track
changed regions and flush them explicitly :)
Anton
prev parent reply other threads:[~2004-03-06 2:36 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2004-03-04 21:06 problem with cache flush routine for G5? Chris Friesen
2004-03-04 23:51 ` Benjamin Herrenschmidt
2004-03-04 23:57 ` Tom Rini
2004-03-05 0:04 ` Benjamin Herrenschmidt
2004-03-05 0:44 ` Chris Friesen
2004-03-05 15:15 ` Tom Rini
2004-03-05 23:51 ` Benjamin Herrenschmidt
2004-03-05 0:37 ` Chris Friesen
2004-03-05 2:10 ` Benjamin Herrenschmidt
2004-03-05 5:39 ` Chris Friesen
2004-03-05 5:46 ` Benjamin Herrenschmidt
2004-03-05 17:21 ` Chris Friesen
2004-03-05 23:53 ` Benjamin Herrenschmidt
2004-03-06 1:34 ` Segher Boessenkool
2004-03-06 2:31 ` Anton Blanchard [this message]
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