Re: Issues with /proc/bus/pci

[Jesse Barnes <jbarnes@sgi.com>]

On Monday 22 March 2004 6:06 pm, Benjamin Herrenschmidt wrote:
> case with the HyperTransport host on the G5, though I could fix
> that in the long term, I suspect it may happen again elsewhere
> as they aren't required to show up as devices).

The same thing happens on Altix machines, our xio<->pci bridges don't show up.

> What do you think of dealing with that with a slight addition to
> the current ioctl's, basically adding a pair equivalent to
> PCIIOC_MMAP_IS_IO and PCIIOC_MMAP_IS_MEM that would be
> PCIIOC_MMAP_IS_HOST_IO and PCIIOC_MMAP_IS_HOST_MEM ? That would
> be, imho, the simplest solution, as far as userland is concerned,
> though it requires updating the implementation of pci_mmap_page_range()
> of all archs that implement it.

It's been awhile since I looked at this API, but this would allow userland to 
map legacy I/O or mem space for a given device using the above commands?

> Another simpler solution would be to consider that mapping outside
> of a device is only ever useful for legacy ISA IO space and simply
> fix the archs to allow an IO mapping of the IO region below 0x400
> using any device pci_dev (provided the region exist on a given host
> of course), since the value passed by userland is an absolute BAR
> address in bus space, that would work.

This would also work, but then on some platforms (like ia64) legacy space 
requires special treatment since target aborts can cause hard fails, so I'd 
prefer the previous approach since it would make setup for dealing with such 
platforms a bit more explicit.

Thanks,
Jesse