Re: PROBLEM: 2.6 kernels on x86 do not preserve FPU flags across context switches

[Andi Kleen <ak@muc.de>]

On Wed, Jun 16, 2004 at 04:01:46PM -0700, eliot@cincom.com wrote:
> Hi Andi,
> 
> 	you asked:
> | On what CPUs does the failure occur? Linux uses different paths
> | depending on if the CPU supports SSE or not.
> 
> Travis responded:
> 
> | We run on both AMDs (Durons and Athlons) as well as PII, PIII, and
> | PIV's. Our kernels are all compiled as generic 586+. Though when we were

And you saw it on all of them?  (in particular both on PII and on PIV?)

I actually doubt the problem happens on a context switch - the kernel
just uses FXSAVE/FNSAVE for this and this is extremly hard to get wrong.
Either you have no FPU state saved at all or you have all, since the
CPU handles it completely in microcode.

Most likely candidate would be signal context saving. When a signal happens 
and the process used floating point then the i386 kernel converts
the internal FXSAVE/FNSAVE image to another image derived from 
iBCS on the signal stack (and then later back). If any problems
with subtle corruptions happen I would expect them in this process.

This would be more likely on SSE enabled CPUs though, on pre SSE
CPUs this code is much simpler.

Do you know which status bit gets corrupted exactly?

-Andi