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From: Rajesh Shah <rajesh.shah@intel.com>
To: Bjorn Helgaas <bjorn.helgaas@hp.com>
Cc: Tom L Nguyen <tom.l.nguyen@intel.com>, linux-kernel@vger.kernel.org
Subject: Re: MSI to memory?
Date: Thu, 1 Jul 2004 11:53:40 -0700	[thread overview]
Message-ID: <20040701115339.A4265@unix-os.sc.intel.com> (raw)
In-Reply-To: <200407011215.59723.bjorn.helgaas@hp.com>; from bjorn.helgaas@hp.com on Thu, Jul 01, 2004 at 12:15:59PM -0600

On Thu, Jul 01, 2004 at 12:15:59PM -0600, Bjorn Helgaas wrote:
> The conventional use of MSI is for a PCI adapter to generate processor
> interrupts by writing to a local APIC.  But I've seen some things

On Intel architecture at least, the MSI writes are targeted 
to the chipset (north bridge), not directly to a local APIC.
The chipset knows the special MSI address and data values 
programmed into the PCI device and interprets the data written, 
e.g.  for interrupt redirection hints.

> If so, is that a useful capability that should be exposed through
> the Linux MSI interface?

With MSI, you get a single address/data pair. So MSI interrupts
won't work unless this single entry is programmed to the 
special interrupt specific values that the chipset expects. 
With MSI-X, you get multiple address/data pairs but this is 
presumably because the device thinks it can benefit from 
multiple interrupts.

What type of usage model did you have in mind to have the 
device write to memory instead of using MSI for interrupts?

Rajesh


  reply	other threads:[~2004-07-01 18:57 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2004-07-01 18:15 MSI to memory? Bjorn Helgaas
2004-07-01 18:53 ` Rajesh Shah [this message]
2004-07-02 15:51   ` Bjorn Helgaas
2004-07-07 12:31   ` Davide Rossetti
2004-07-07 12:45     ` Helge Hafting
2004-07-07 16:59       ` Roland Dreier
2004-07-08  9:03         ` Helge Hafting
2004-07-07 17:04       ` Zwane Mwaikambo
2004-07-07 13:15     ` Richard B. Johnson
2004-07-07 17:13     ` Rajesh Shah
2004-07-02 16:04 ` Roland Dreier

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