* [PATCH] [ix86,x86_64] cpu features.
@ 2004-08-13 15:24 Paweł Sikora
0 siblings, 0 replies; 7+ messages in thread
From: Paweł Sikora @ 2004-08-13 15:24 UTC (permalink / raw)
To: linux-kernel; +Cc: Andrew Morton
[-- Attachment #1: Type: text/plain, Size: 393 bytes --]
Hi,
Attached patch fix/add several cpu features.
refs:
[1] Intel Processor Identification and the CPUID instruction
Application Note 485.
http://developer.intel.ru/download/design/Xeon/applnots/24161826.pdf
[2] http://www.sandpile.org/ia32/cpuid.htm
--
/* Copyright (C) 2003, SCO, Inc. This is valuable Intellectual Property. */
#define say(x) lie(x)
[-- Attachment #2: cpu_feature.patch --]
[-- Type: text/x-diff, Size: 3260 bytes --]
--- linux-2.6.8-rc4/arch/i386/kernel/cpu/proc.c.orig 2004-08-10 04:23:46.000000000 +0200
+++ linux-2.6.8-rc4/arch/i386/kernel/cpu/proc.c 2004-08-13 16:48:53.971370504 +0200
@@ -44,8 +44,8 @@
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
/* Intel-defined (#2) */
- "pni", NULL, NULL, "monitor", "ds_cpl", NULL, NULL, "tm2",
- "est", NULL, "cid", NULL, NULL, NULL, NULL, NULL,
+ "sse3", NULL, NULL, "monitor", "ds_cpl", NULL, NULL, "est",
+ "tm2", NULL, "cid", NULL, NULL, NULL, "xtpr", NULL,
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
--- linux-2.6.8-rc4/arch/x86_64/kernel/setup.c.orig 2004-08-10 04:22:11.000000000 +0200
+++ linux-2.6.8-rc4/arch/x86_64/kernel/setup.c 2004-08-13 16:59:14.729001000 +0200
@@ -1042,8 +1042,8 @@
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
/* Intel-defined (#2) */
- "pni", NULL, NULL, "monitor", "ds_cpl", NULL, NULL, "tm2",
- "est", NULL, "cid", NULL, NULL, "cmpxchg16b", NULL, NULL,
+ "sse3", NULL, NULL, "monitor", "ds_cpl", NULL, NULL, "est",
+ "tm2", NULL, "cid", NULL, NULL, "cx16", "xtpr", NULL,
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
};
--- linux-2.6.8-rc4/include/asm-i386/cpufeature.h.orig 2004-08-10 04:23:22.000000000 +0200
+++ linux-2.6.8-rc4/include/asm-i386/cpufeature.h 2004-08-13 16:49:19.439498760 +0200
@@ -71,9 +71,13 @@
#define X86_FEATURE_P4 (3*32+ 7) /* P4 */
/* Intel-defined CPU features, CPUID level 0x00000001 (ecx), word 4 */
-#define X86_FEATURE_EST (4*32+ 7) /* Enhanced SpeedStep */
+#define X86_FEATURE_XMM3 (4*32+ 0) /* Streaming SIMD Extensions-3 */
#define X86_FEATURE_MWAIT (4*32+ 3) /* Monitor/Mwait support */
-
+#define X86_FEATURE_DSCPL (4*32+ 4) /* CPL Qualified Debug Store */
+#define X86_FEATURE_EST (4*32+ 7) /* Enhanced SpeedStep */
+#define X86_FEATURE_TM2 (4*32+ 8) /* Thermal Monitor 2 */
+#define X86_FEATURE_CID (4*32+10) /* Context ID */
+#define X86_FEATURE_XTPR (4*32+14) /* Send Task Priority Messages */
/* VIA/Cyrix/Centaur-defined CPU features, CPUID level 0xC0000001, word 5 */
#define X86_FEATURE_XSTORE (5*32+ 2) /* on-CPU RNG present (xstore insn) */
--- linux-2.6.8-rc4/include/asm-x86_64/cpufeature.h.orig 2004-08-10 04:23:13.000000000 +0200
+++ linux-2.6.8-rc4/include/asm-x86_64/cpufeature.h 2004-08-13 16:53:48.776553304 +0200
@@ -63,8 +63,14 @@
#define X86_FEATURE_K8_C (3*32+ 4) /* C stepping K8 */
/* Intel-defined CPU features, CPUID level 0x00000001 (ecx), word 4 */
-#define X86_FEATURE_EST (4*32+ 7) /* Enhanced SpeedStep */
+#define X86_FEATURE_XMM3 (4*32+ 0) /* Streaming SIMD Extensions-3 */
#define X86_FEATURE_MWAIT (4*32+ 3) /* Monitor/Mwait support */
+#define X86_FEATURE_DSCPL (4*32+ 4) /* CPL Qualified Debug Store */
+#define X86_FEATURE_EST (4*32+ 7) /* Enhanced SpeedStep */
+#define X86_FEATURE_TM2 (4*32+ 8) /* Thermal Monitor 2 */
+#define X86_FEATURE_CID (4*32+10) /* Context ID */
+#define X86_FEATURE_CX16 (4*32+13) /* CMPXCHG16B */
+#define X86_FEATURE_XTPR (4*32+14) /* Send Task Priority Messages */
#define cpu_has(c, bit) test_bit(bit, (c)->x86_capability)
#define boot_cpu_has(bit) test_bit(bit, boot_cpu_data.x86_capability)
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH] [ix86,x86_64] cpu features.
[not found] <2sMat-61I-43@gated-at.bofh.it>
@ 2004-08-13 16:11 ` Andi Kleen
2004-08-13 17:02 ` Paweł Sikora
0 siblings, 1 reply; 7+ messages in thread
From: Andi Kleen @ 2004-08-13 16:11 UTC (permalink / raw)
To: Paweâ Sikora; +Cc: linux-kernel
Paweâ Sikora <pluto@pld-linux.org> writes:
> +++ linux-2.6.8-rc4/arch/i386/kernel/cpu/proc.c 2004-08-13 16:48:53.971370504 +0200
> @@ -44,8 +44,8 @@
> NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
>
> /* Intel-defined (#2) */
> - "pni", NULL, NULL, "monitor", "ds_cpl", NULL, NULL, "tm2",
> - "est", NULL, "cid", NULL, NULL, NULL, NULL, NULL,
> + "sse3", NULL, NULL, "monitor", "ds_cpl", NULL, NULL, "est",
> + "tm2", NULL, "cid", NULL, NULL, NULL, "xtpr", NULL,
You cannot just do the pni -> sse3 rename. That could break existing
applications that read /proc/cpuinfo and parse it. The only way would
be to add a new sse3 flag in addition to pni, but I guess that would
be not worth the ugly special case.
-Andi
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH] [ix86,x86_64] cpu features.
2004-08-13 16:11 ` [PATCH] [ix86,x86_64] cpu features Andi Kleen
@ 2004-08-13 17:02 ` Paweł Sikora
2004-08-13 17:08 ` Paweł Sikora
2004-08-13 20:14 ` Andi Kleen
0 siblings, 2 replies; 7+ messages in thread
From: Paweł Sikora @ 2004-08-13 17:02 UTC (permalink / raw)
To: Andi Kleen; +Cc: linux-kernel
[-- Attachment #1: Type: text/plain, Size: 979 bytes --]
On Friday 13 of August 2004 18:11, Andi Kleen wrote:
> Paweâ Sikora <pluto@pld-linux.org> writes:
> > +++ linux-2.6.8-rc4/arch/i386/kernel/cpu/proc.c 2004-08-13
> > 16:48:53.971370504 +0200 @@ -44,8 +44,8 @@
> > NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
> >
> > /* Intel-defined (#2) */
> > - "pni", NULL, NULL, "monitor", "ds_cpl", NULL, NULL, "tm2",
> > - "est", NULL, "cid", NULL, NULL, NULL, NULL, NULL,
> > + "sse3", NULL, NULL, "monitor", "ds_cpl", NULL, NULL, "est",
> > + "tm2", NULL, "cid", NULL, NULL, NULL, "xtpr", NULL,
>
> You cannot just do the pni -> sse3 rename. That could break existing
> applications that read /proc/cpuinfo and parse it. The only way would
> be to add a new sse3 flag in addition to pni, but I guess that would
> be not worth the ugly special case.
Ok, it's now correct?
--
/* Copyright (C) 2003, SCO, Inc. This is valuable Intellectual Property. */
#define say(x) lie(x)
[-- Attachment #2: 0.diff --]
[-- Type: text/x-diff, Size: 3000 bytes --]
Index: 2.6.8-cpu_feature.patch
===================================================================
RCS file: /cvsroot/SOURCES/Attic/2.6.8-cpu_feature.patch,v
retrieving revision 1.1.2.1
diff -u -r1.1.2.1 2.6.8-cpu_feature.patch
--- 2.6.8-cpu_feature.patch 13 Aug 2004 15:29:38 -0000 1.1.2.1
+++ 2.6.8-cpu_feature.patch 13 Aug 2004 16:55:10 -0000
@@ -6,7 +6,7 @@
/* Intel-defined (#2) */
- "pni", NULL, NULL, "monitor", "ds_cpl", NULL, NULL, "tm2",
- "est", NULL, "cid", NULL, NULL, NULL, NULL, NULL,
-+ "sse3", NULL, NULL, "monitor", "ds_cpl", NULL, NULL, "est",
++ "pni", NULL, NULL, "monitor", "ds_cpl", NULL, NULL, "est",
+ "tm2", NULL, "cid", NULL, NULL, NULL, "xtpr", NULL,
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
@@ -19,7 +19,7 @@
/* Intel-defined (#2) */
- "pni", NULL, NULL, "monitor", "ds_cpl", NULL, NULL, "tm2",
- "est", NULL, "cid", NULL, NULL, "cmpxchg16b", NULL, NULL,
-+ "sse3", NULL, NULL, "monitor", "ds_cpl", NULL, NULL, "est",
++ "pni", NULL, NULL, "monitor", "ds_cpl", NULL, NULL, "est",
+ "tm2", NULL, "cid", NULL, NULL, "cx16", "xtpr", NULL,
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
@@ -42,6 +42,22 @@
/* VIA/Cyrix/Centaur-defined CPU features, CPUID level 0xC0000001, word 5 */
#define X86_FEATURE_XSTORE (5*32+ 2) /* on-CPU RNG present (xstore insn) */
+@@ -93,13 +97,14 @@
+ #define cpu_has_tsc boot_cpu_has(X86_FEATURE_TSC)
+ #define cpu_has_pae boot_cpu_has(X86_FEATURE_PAE)
+ #define cpu_has_pge boot_cpu_has(X86_FEATURE_PGE)
+-#define cpu_has_sse2 boot_cpu_has(X86_FEATURE_XMM2)
+ #define cpu_has_apic boot_cpu_has(X86_FEATURE_APIC)
+ #define cpu_has_sep boot_cpu_has(X86_FEATURE_SEP)
+ #define cpu_has_mtrr boot_cpu_has(X86_FEATURE_MTRR)
+ #define cpu_has_mmx boot_cpu_has(X86_FEATURE_MMX)
+ #define cpu_has_fxsr boot_cpu_has(X86_FEATURE_FXSR)
+ #define cpu_has_xmm boot_cpu_has(X86_FEATURE_XMM)
++#define cpu_has_xmm2 boot_cpu_has(X86_FEATURE_XMM2)
++#define cpu_has_xmm3 boot_cpu_has(X86_FEATURE_XMM3)
+ #define cpu_has_ht boot_cpu_has(X86_FEATURE_HT)
+ #define cpu_has_mp boot_cpu_has(X86_FEATURE_MP)
+ #define cpu_has_nx boot_cpu_has(X86_FEATURE_NX)
--- linux-2.6.8-rc4/include/asm-x86_64/cpufeature.h.orig 2004-08-10 04:23:13.000000000 +0200
+++ linux-2.6.8-rc4/include/asm-x86_64/cpufeature.h 2004-08-13 16:53:48.776553304 +0200
@@ -63,8 +63,14 @@
@@ -60,3 +76,12 @@
#define cpu_has(c, bit) test_bit(bit, (c)->x86_capability)
#define boot_cpu_has(bit) test_bit(bit, boot_cpu_data.x86_capability)
+@@ -81,6 +87,8 @@
+ #define cpu_has_mmx 1
+ #define cpu_has_fxsr 1
+ #define cpu_has_xmm 1
++#define cpu_has_xmm2 1
++#define cpu_has_xmm3 boot_cpu_has(X86_FEATURE_XMM3)
+ #define cpu_has_ht boot_cpu_has(X86_FEATURE_HT)
+ #define cpu_has_mp 1 /* XXX */
+ #define cpu_has_k6_mtrr 0
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH] [ix86,x86_64] cpu features.
2004-08-13 17:02 ` Paweł Sikora
@ 2004-08-13 17:08 ` Paweł Sikora
2004-08-13 20:14 ` Andi Kleen
1 sibling, 0 replies; 7+ messages in thread
From: Paweł Sikora @ 2004-08-13 17:08 UTC (permalink / raw)
To: Andi Kleen; +Cc: linux-kernel
> Ok, it's now correct?
My english is poor :-(
--
/* Copyright (C) 2003, SCO, Inc. This is valuable Intellectual Property. */
#define say(x) lie(x)
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH] [ix86,x86_64] cpu features.
2004-08-13 17:02 ` Paweł Sikora
2004-08-13 17:08 ` Paweł Sikora
@ 2004-08-13 20:14 ` Andi Kleen
2004-08-13 20:29 ` Paweł Sikora
1 sibling, 1 reply; 7+ messages in thread
From: Andi Kleen @ 2004-08-13 20:14 UTC (permalink / raw)
To: Pawe?? Sikora; +Cc: linux-kernel
On Fri, Aug 13, 2004 at 07:02:45PM +0200, Pawe?? Sikora wrote:
> On Friday 13 of August 2004 18:11, Andi Kleen wrote:
> > Pawe? Sikora <pluto@pld-linux.org> writes:
> > > +++ linux-2.6.8-rc4/arch/i386/kernel/cpu/proc.c 2004-08-13
> > > 16:48:53.971370504 +0200 @@ -44,8 +44,8 @@
> > > NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
> > >
> > > /* Intel-defined (#2) */
> > > - "pni", NULL, NULL, "monitor", "ds_cpl", NULL, NULL, "tm2",
> > > - "est", NULL, "cid", NULL, NULL, NULL, NULL, NULL,
> > > + "sse3", NULL, NULL, "monitor", "ds_cpl", NULL, NULL, "est",
> > > + "tm2", NULL, "cid", NULL, NULL, NULL, "xtpr", NULL,
> >
> > You cannot just do the pni -> sse3 rename. That could break existing
> > applications that read /proc/cpuinfo and parse it. The only way would
> > be to add a new sse3 flag in addition to pni, but I guess that would
> > be not worth the ugly special case.
>
> Ok, it's now correct?
Can you please send a new diff, a diff of a diff is not very nice
to read.
-Andi
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH] [ix86,x86_64] cpu features.
2004-08-13 20:14 ` Andi Kleen
@ 2004-08-13 20:29 ` Paweł Sikora
0 siblings, 0 replies; 7+ messages in thread
From: Paweł Sikora @ 2004-08-13 20:29 UTC (permalink / raw)
To: Andi Kleen; +Cc: linux-kernel
[-- Attachment #1: Type: text/plain, Size: 1 bytes --]
[-- Attachment #2: 2.6.8-cpu_feature.patch --]
[-- Type: text/x-diff, Size: 4420 bytes --]
--- linux-2.6.8-rc4/arch/i386/kernel/cpu/proc.c.orig 2004-08-10 04:23:46.000000000 +0200
+++ linux-2.6.8-rc4/arch/i386/kernel/cpu/proc.c 2004-08-13 16:48:53.971370504 +0200
@@ -44,8 +44,8 @@
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
/* Intel-defined (#2) */
- "pni", NULL, NULL, "monitor", "ds_cpl", NULL, NULL, "tm2",
- "est", NULL, "cid", NULL, NULL, NULL, NULL, NULL,
+ "pni", NULL, NULL, "monitor", "ds_cpl", NULL, NULL, "est",
+ "tm2", NULL, "cid", NULL, NULL, NULL, "xtpr", NULL,
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
--- linux-2.6.8-rc4/arch/x86_64/kernel/setup.c.orig 2004-08-10 04:22:11.000000000 +0200
+++ linux-2.6.8-rc4/arch/x86_64/kernel/setup.c 2004-08-13 16:59:14.729001000 +0200
@@ -1042,8 +1042,8 @@
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
/* Intel-defined (#2) */
- "pni", NULL, NULL, "monitor", "ds_cpl", NULL, NULL, "tm2",
- "est", NULL, "cid", NULL, NULL, "cmpxchg16b", NULL, NULL,
+ "pni", NULL, NULL, "monitor", "ds_cpl", NULL, NULL, "est",
+ "tm2", NULL, "cid", NULL, NULL, "cx16", "xtpr", NULL,
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
};
--- linux-2.6.8-rc4/include/asm-i386/cpufeature.h.orig 2004-08-10 04:23:22.000000000 +0200
+++ linux-2.6.8-rc4/include/asm-i386/cpufeature.h 2004-08-13 16:49:19.439498760 +0200
@@ -71,9 +71,13 @@
#define X86_FEATURE_P4 (3*32+ 7) /* P4 */
/* Intel-defined CPU features, CPUID level 0x00000001 (ecx), word 4 */
-#define X86_FEATURE_EST (4*32+ 7) /* Enhanced SpeedStep */
+#define X86_FEATURE_XMM3 (4*32+ 0) /* Streaming SIMD Extensions-3 */
#define X86_FEATURE_MWAIT (4*32+ 3) /* Monitor/Mwait support */
-
+#define X86_FEATURE_DSCPL (4*32+ 4) /* CPL Qualified Debug Store */
+#define X86_FEATURE_EST (4*32+ 7) /* Enhanced SpeedStep */
+#define X86_FEATURE_TM2 (4*32+ 8) /* Thermal Monitor 2 */
+#define X86_FEATURE_CID (4*32+10) /* Context ID */
+#define X86_FEATURE_XTPR (4*32+14) /* Send Task Priority Messages */
/* VIA/Cyrix/Centaur-defined CPU features, CPUID level 0xC0000001, word 5 */
#define X86_FEATURE_XSTORE (5*32+ 2) /* on-CPU RNG present (xstore insn) */
@@ -93,13 +97,14 @@
#define cpu_has_tsc boot_cpu_has(X86_FEATURE_TSC)
#define cpu_has_pae boot_cpu_has(X86_FEATURE_PAE)
#define cpu_has_pge boot_cpu_has(X86_FEATURE_PGE)
-#define cpu_has_sse2 boot_cpu_has(X86_FEATURE_XMM2)
#define cpu_has_apic boot_cpu_has(X86_FEATURE_APIC)
#define cpu_has_sep boot_cpu_has(X86_FEATURE_SEP)
#define cpu_has_mtrr boot_cpu_has(X86_FEATURE_MTRR)
#define cpu_has_mmx boot_cpu_has(X86_FEATURE_MMX)
#define cpu_has_fxsr boot_cpu_has(X86_FEATURE_FXSR)
#define cpu_has_xmm boot_cpu_has(X86_FEATURE_XMM)
+#define cpu_has_xmm2 boot_cpu_has(X86_FEATURE_XMM2)
+#define cpu_has_xmm3 boot_cpu_has(X86_FEATURE_XMM3)
#define cpu_has_ht boot_cpu_has(X86_FEATURE_HT)
#define cpu_has_mp boot_cpu_has(X86_FEATURE_MP)
#define cpu_has_nx boot_cpu_has(X86_FEATURE_NX)
--- linux-2.6.8-rc4/include/asm-x86_64/cpufeature.h.orig 2004-08-10 04:23:13.000000000 +0200
+++ linux-2.6.8-rc4/include/asm-x86_64/cpufeature.h 2004-08-13 16:53:48.776553304 +0200
@@ -63,8 +63,14 @@
#define X86_FEATURE_K8_C (3*32+ 4) /* C stepping K8 */
/* Intel-defined CPU features, CPUID level 0x00000001 (ecx), word 4 */
-#define X86_FEATURE_EST (4*32+ 7) /* Enhanced SpeedStep */
+#define X86_FEATURE_XMM3 (4*32+ 0) /* Streaming SIMD Extensions-3 */
#define X86_FEATURE_MWAIT (4*32+ 3) /* Monitor/Mwait support */
+#define X86_FEATURE_DSCPL (4*32+ 4) /* CPL Qualified Debug Store */
+#define X86_FEATURE_EST (4*32+ 7) /* Enhanced SpeedStep */
+#define X86_FEATURE_TM2 (4*32+ 8) /* Thermal Monitor 2 */
+#define X86_FEATURE_CID (4*32+10) /* Context ID */
+#define X86_FEATURE_CX16 (4*32+13) /* CMPXCHG16B */
+#define X86_FEATURE_XTPR (4*32+14) /* Send Task Priority Messages */
#define cpu_has(c, bit) test_bit(bit, (c)->x86_capability)
#define boot_cpu_has(bit) test_bit(bit, boot_cpu_data.x86_capability)
@@ -81,6 +87,8 @@
#define cpu_has_mmx 1
#define cpu_has_fxsr 1
#define cpu_has_xmm 1
+#define cpu_has_xmm2 1
+#define cpu_has_xmm3 boot_cpu_has(X86_FEATURE_XMM3)
#define cpu_has_ht boot_cpu_has(X86_FEATURE_HT)
#define cpu_has_mp 1 /* XXX */
#define cpu_has_k6_mtrr 0
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH] ix86,x86_64 cpu features
[not found] <200408242233.i7OMXrTd001684@hera.kernel.org>
@ 2004-08-25 0:47 ` Jeff Garzik
0 siblings, 0 replies; 7+ messages in thread
From: Jeff Garzik @ 2004-08-25 0:47 UTC (permalink / raw)
To: pluto, akpm; +Cc: Linux Kernel Mailing List
Linux Kernel Mailing List wrote:
> diff -Nru a/include/asm-x86_64/cpufeature.h b/include/asm-x86_64/cpufeature.h
> --- a/include/asm-x86_64/cpufeature.h 2004-08-24 15:34:02 -07:00
> +++ b/include/asm-x86_64/cpufeature.h 2004-08-24 15:34:02 -07:00
> @@ -63,8 +63,14 @@
> #define X86_FEATURE_K8_C (3*32+ 4) /* C stepping K8 */
>
> /* Intel-defined CPU features, CPUID level 0x00000001 (ecx), word 4 */
> -#define X86_FEATURE_EST (4*32+ 7) /* Enhanced SpeedStep */
> +#define X86_FEATURE_XMM3 (4*32+ 0) /* Streaming SIMD Extensions-3 */
> #define X86_FEATURE_MWAIT (4*32+ 3) /* Monitor/Mwait support */
> +#define X86_FEATURE_DSCPL (4*32+ 4) /* CPL Qualified Debug Store */
> +#define X86_FEATURE_EST (4*32+ 7) /* Enhanced SpeedStep */
> +#define X86_FEATURE_TM2 (4*32+ 8) /* Thermal Monitor 2 */
> +#define X86_FEATURE_CID (4*32+10) /* Context ID */
> +#define X86_FEATURE_CX16 (4*32+13) /* CMPXCHG16B */
> +#define X86_FEATURE_XTPR (4*32+14) /* Send Task Priority Messages */
FYI, the style for cpufeature.h is to _not_ add constants for a feature
bit unless that feature is actually used.
Jeff, one of the people who last touched this area of code
^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2004-08-25 0:48 UTC | newest]
Thread overview: 7+ messages (download: mbox.gz follow: Atom feed
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[not found] <2sMat-61I-43@gated-at.bofh.it>
2004-08-13 16:11 ` [PATCH] [ix86,x86_64] cpu features Andi Kleen
2004-08-13 17:02 ` Paweł Sikora
2004-08-13 17:08 ` Paweł Sikora
2004-08-13 20:14 ` Andi Kleen
2004-08-13 20:29 ` Paweł Sikora
[not found] <200408242233.i7OMXrTd001684@hera.kernel.org>
2004-08-25 0:47 ` [PATCH] ix86,x86_64 " Jeff Garzik
2004-08-13 15:24 [PATCH] [ix86,x86_64] " Paweł Sikora
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