[PATCH] [ix86,x86_64] cpu features.

Paweł Sikora
2004-08-13T15:24:48Z

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Hi,

Attached patch fix/add several cpu features.

refs:

[1] Intel Processor Identification and the CPUID instruction
Application Note 485.
http://developer.intel.ru/download/design/Xeon/applnots/24161826.pdf

[2] http://www.sandpile.org/ia32/cpuid.htm

--
/* Copyright (C) 2003, SCO, Inc. This is valuable Intellectual Property. */

#define say(x) lie(x)

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--- linux-2.6.8-rc4/arch/i386/kernel/cpu/proc.c.orig 2004-08-10 04:23:46.000000000 +0200
+++ linux-2.6.8-rc4/arch/i386/kernel/cpu/proc.c 2004-08-13 16:48:53.971370504 +0200
@@ -44,8 +44,8 @@
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,

/* Intel-defined (#2) */
- "pni", NULL, NULL, "monitor", "ds_cpl", NULL, NULL, "tm2",
- "est", NULL, "cid", NULL, NULL, NULL, NULL, NULL,
+ "sse3", NULL, NULL, "monitor", "ds_cpl", NULL, NULL, "est",
+ "tm2", NULL, "cid", NULL, NULL, NULL, "xtpr", NULL,
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,

--- linux-2.6.8-rc4/arch/x86_64/kernel/setup.c.orig 2004-08-10 04:22:11.000000000 +0200
+++ linux-2.6.8-rc4/arch/x86_64/kernel/setup.c 2004-08-13 16:59:14.729001000 +0200
@@ -1042,8 +1042,8 @@
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,

/* Intel-defined (#2) */
- "pni", NULL, NULL, "monitor", "ds_cpl", NULL, NULL, "tm2",
- "est", NULL, "cid", NULL, NULL, "cmpxchg16b", NULL, NULL,
+ "sse3", NULL, NULL, "monitor", "ds_cpl", NULL, NULL, "est",
+ "tm2", NULL, "cid", NULL, NULL, "cx16", "xtpr", NULL,
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
};
--- linux-2.6.8-rc4/include/asm-i386/cpufeature.h.orig 2004-08-10 04:23:22.000000000 +0200
+++ linux-2.6.8-rc4/include/asm-i386/cpufeature.h 2004-08-13 16:49:19.439498760 +0200
@@ -71,9 +71,13 @@
#define X86_FEATURE_P4 (3*32+ 7) /* P4 */

/* Intel-defined CPU features, CPUID level 0x00000001 (ecx), word 4 */
-#define X86_FEATURE_EST (4*32+ 7) /* Enhanced SpeedStep */
+#define X86_FEATURE_XMM3 (4*32+ 0) /* Streaming SIMD Extensions-3 */
#define X86_FEATURE_MWAIT (4*32+ 3) /* Monitor/Mwait support */
-
+#define X86_FEATURE_DSCPL (4*32+ 4) /* CPL Qualified Debug Store */
+#define X86_FEATURE_EST (4*32+ 7) /* Enhanced SpeedStep */
+#define X86_FEATURE_TM2 (4*32+ 8) /* Thermal Monitor 2 */
+#define X86_FEATURE_CID (4*32+10) /* Context ID */
+#define X86_FEATURE_XTPR (4*32+14) /* Send Task Priority Messages */

/* VIA/Cyrix/Centaur-defined CPU features, CPUID level 0xC0000001, word 5 */
#define X86_FEATURE_XSTORE (5*32+ 2) /* on-CPU RNG present (xstore insn) */
--- linux-2.6.8-rc4/include/asm-x86_64/cpufeature.h.orig 2004-08-10 04:23:13.000000000 +0200
+++ linux-2.6.8-rc4/include/asm-x86_64/cpufeature.h 2004-08-13 16:53:48.776553304 +0200
@@ -63,8 +63,14 @@
#define X86_FEATURE_K8_C (3*32+ 4) /* C stepping K8 */

/* Intel-defined CPU features, CPUID level 0x00000001 (ecx), word 4 */
-#define X86_FEATURE_EST (4*32+ 7) /* Enhanced SpeedStep */
+#define X86_FEATURE_XMM3 (4*32+ 0) /* Streaming SIMD Extensions-3 */
#define X86_FEATURE_MWAIT (4*32+ 3) /* Monitor/Mwait support */
+#define X86_FEATURE_DSCPL (4*32+ 4) /* CPL Qualified Debug Store */
+#define X86_FEATURE_EST (4*32+ 7) /* Enhanced SpeedStep */
+#define X86_FEATURE_TM2 (4*32+ 8) /* Thermal Monitor 2 */
+#define X86_FEATURE_CID (4*32+10) /* Context ID */
+#define X86_FEATURE_CX16 (4*32+13) /* CMPXCHG16B */
+#define X86_FEATURE_XTPR (4*32+14) /* Send Task Priority Messages */

#define cpu_has(c, bit) test_bit(bit, (c)->x86_capability)
#define boot_cpu_has(bit) test_bit(bit, boot_cpu_data.x86_capability)