From: Andi Kleen <ak@suse.de>
To: Andrea Arcangeli <andrea@novell.com>
Cc: haveblue@us.ibm.com, linux-kernel@vger.kernel.org, akpm@osdl.org
Subject: Re: 4level page tables for Linux
Date: Wed, 13 Oct 2004 21:35:58 +0200 [thread overview]
Message-ID: <20041013213558.43b3236c.ak@suse.de> (raw)
In-Reply-To: <20041013184153.GO17849@dualathlon.random>
On Wed, 13 Oct 2004 20:41:53 +0200
Andrea Arcangeli <andrea@novell.com> wrote:
>
> after you add the 4level, locking will become necessary for the pgd, but
> it's still not needed for the pml4.
Yes, agreed. I did an audit of the generic code and it seems to be ok
regarding the pgd use.
> peraphs we could consider pgd4 instead of pml4. What does "pml" stands
> for?
page mapping level 4 (?) just guessing here.
PML4 is the name AMD and Intel use in their documentation. I don't see
a particular reason to be different from them.
-Andi
next prev parent reply other threads:[~2004-10-13 19:48 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2004-10-12 13:59 4level page tables for Linux Andi Kleen
2004-10-12 18:48 ` Dave Hansen
2004-10-12 19:03 ` Andi Kleen
2004-10-12 19:08 ` 4level page tables for Linux II Andi Kleen
2004-10-13 18:41 ` 4level page tables for Linux Andrea Arcangeli
2004-10-13 19:35 ` Andi Kleen [this message]
2004-10-13 20:04 ` Andrea Arcangeli
2004-10-18 17:02 ` Christoph Lameter
2004-10-18 17:21 ` Andi Kleen
2004-10-18 17:38 ` Andrea Arcangeli
-- strict thread matches above, loose matches on Subject: below --
2004-10-13 23:22 Albert Cahalan
2004-10-13 23:51 ` Andrea Arcangeli
2004-10-14 1:15 ` Albert Cahalan
2004-10-14 9:25 linux
2004-10-14 11:15 ` Robin Holt
2004-10-17 2:57 ` H. Peter Anvin
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