Re: [PATCH 1/1] pci: Block config access during BIST (resend)

Brian King
2005-01-27T18:45:04Z

Alan Cox wrote:
> On Mer, 2005-01-26 at 22:10, Benjamin Herrenschmidt wrote:
>
>>On Wed, 2005-01-26 at 10:34 -0600, Brian King wrote:
>>Well, I honestly think that this is unnecessary burden. I think that
>>just dropping writes & returning data from the cache on reads is enough,
>>blocking userspace isn't necessary, but then, I may be wrong ;)
>
>
> Providing the BARs, cmd register and bridge VGA_EN are cached then I
> think you
> are right.

The first 64 bytes of config space are cached, so this should handle the
registers you mention above.

--
Brian King
eServer Storage I/O
IBM Linux Technology Center