Re: [RFC] PCI bridge driver rewrite

[Jesse Barnes <jbarnes@sgi.com>]

On Wednesday, February 23, 2005 11:03 pm, Adam Belay wrote:
> Yeah, actually I've been thinking about this issue a lot.  I think it
> would make a lot of sense to export this sort of thing under the
> "pci_bus" class in sysfs.  The ISA enable bit should probably also be
> exported.  Furthermore, we should be verifying the BIOS's configuration
> of VGA and ISA.  I'll try to integrate this in my future releases.  I
> appreciate the code.
>
> I also have a number of resource management plans for the VGA enable bit
> that I'll get into in my next set of patches.

Keep in mind that the interface above is probably specific to PCI to PCI 
bridges since there's a spec for that.  Host to PCI bridges may implement 
their own methods for VGA routing and legacy port access.

> > Jesse can comment on the specific support needed for multiple legacy IO
> > spaces.
>
> That would be great.  Most of my experience has been with only a couple
> legacy IO port ranges passing through the bridge.

Well, I'll give you one, somewhat perverse, example.  On SGI sn2 machines, 
each host<->pci bridge (either xio<->pci or numalink<->pci) has two pci 
busses and some additional host bus ports.  The bridges are capable of 
generating low address bus cycles on both busses simultaneously, so we can do 
ISA memory access and legacy port I/O on every bus in the system at the same 
time.

The main host chipset has no notion of VGA or legacy routing though, so doing 
a port access to say 0x3c8 is ambiguous--we need a bus to target (though the 
platform code could provide a 'default' bus for such accesses to go to, this 
may be what VGA or legacy routing means for us under your scheme).  Likewise, 
accessing ISA memory space like 0xa0000 needs a bus to target.

It would be nice if this sort of thing was taken into account in your new 
model, so that for example we could have the vgacon driver talking to 
multiple different VGA cards at the same time.

Thanks,
Jesse