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From: Russell King <rmk+lkml@arm.linux.org.uk>
To: Catalin Marinas <catalin.marinas@arm.com>
Cc: "David S. Miller" <davem@davemloft.net>, linux-kernel@vger.kernel.org
Subject: Re: 2.6.13-rc3: cache flush missing from somewhere
Date: Mon, 1 Aug 2005 17:40:30 +0100	[thread overview]
Message-ID: <20050801174030.C14401@flint.arm.linux.org.uk> (raw)
In-Reply-To: <tnxzms1c0bf.fsf@arm.com>; from catalin.marinas@arm.com on Mon, Aug 01, 2005 at 01:24:04PM +0100

On Mon, Aug 01, 2005 at 01:24:04PM +0100, Catalin Marinas wrote:
> "David S. Miller" <davem@davemloft.net> wrote:
> > From: Russell King <rmk+lkml@arm.linux.org.uk>
> > Date: Fri, 29 Jul 2005 16:13:43 +0100
> >
> >> My current patch to get this working is below.  The only thing which
> >> really seems to fix the issue is the __flush_dcache_page call in
> >> read_pages() - if I remove this, I get spurious segfaults and illegal
> >> instruction faults.
> >
> > If one cpu stores, does it get picked up in the other cpu's I-cache?
> 
> It only gets picked up by the other CPU's D-cache (which is fully
> coherent between cores). The I-cache needs to be invalidated on each
> CPU.

Are you sure about this requirement?  I see no evidence of it in Harry's
patch set.

-- 
Russell King
 Linux kernel    2.6 ARM Linux   - http://www.arm.linux.org.uk/
 maintainer of:  2.6 Serial core

  parent reply	other threads:[~2005-08-01 16:40 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2005-07-29 15:13 2.6.13-rc3: cache flush missing from somewhere Russell King
2005-07-30 19:40 ` David S. Miller
2005-07-30 20:08   ` Russell King
2005-07-31  0:09     ` David S. Miller
2005-08-01 12:24   ` Catalin Marinas
2005-08-01 15:35     ` David S. Miller
2005-08-01 16:34       ` Catalin Marinas
2005-08-01 16:40     ` Russell King [this message]
2005-08-01 16:54       ` Catalin Marinas
2005-08-01 17:01         ` Russell King
2005-08-01 18:37           ` Catalin Marinas

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