Re: 2.6.13-rc3: cache flush missing from somewhere

[Russell King <rmk+lkml@arm.linux.org.uk>]

On Mon, Aug 01, 2005 at 05:54:33PM +0100, Catalin Marinas wrote:
> Russell King <rmk+lkml@arm.linux.org.uk> wrote:
> > On Mon, Aug 01, 2005 at 01:24:04PM +0100, Catalin Marinas wrote:
> >> "David S. Miller" <davem@davemloft.net> wrote:
> >> > If one cpu stores, does it get picked up in the other cpu's I-cache?
> >> 
> >> It only gets picked up by the other CPU's D-cache (which is fully
> >> coherent between cores). The I-cache needs to be invalidated on each
> >> CPU.
> >
> > Are you sure about this requirement?  I see no evidence of it in Harry's
> > patch set.
> 
> I asked the people that know more about this architecture than me and
> they confirmed that this is a requirement. I will double check
> tomorrow with the people that did the initial Linux support.
> 
> I haven't checked the original patch but it might work (by luck)
> without the I-cache invalidation (and without stressing it too
> much). This is because you might do a full mm flush when a process
> exits and the I-cache would be clean for newly allocated pages (only
> the D-cache needs flushing). If you don't overload memory, you don't
> get pages swapped-out/removed and the code in a page for a given
> process might remain unchanged until the process exits.

Given that it's sometimes going wrong as early as the first process, I
doubt this is what's happening.  The i-cache will be clean at this point
for the userspace programs.

-- 
Russell King
 Linux kernel    2.6 ARM Linux   - http://www.arm.linux.org.uk/
 maintainer of:  2.6 Serial core