[PATCH 0/5] AMD Geode GX/LX support V2

[PATCH 0/5] AMD Geode GX/LX support V2

[Jordan Crouse]

Thanks to everybody for their constructive comments on my previous 
patch posting.  I ended up eliminating one patch, and combining two
of the others, so we're down to 5 from the original 7.  

Patches 1 and 2 from before have been combined into 1 patch, and patch
4 (IDE) has been removed all together in lieu of a better patch floating
around on the linux-ide list.

Al patches following have individual changelogs attached. 
Thanks again for your comments - keep 'em coming.

Jordan
-- 
Jordan Crouse
Senior Linux Engineer
AMD - Personal Connectivity Solutions Group
<www.amd.com/embeddedprocessors>

[PATCH 1/5] AMD Geode GX/LX support V2

[Jordan Crouse]

This patch combines the previous two patches which added individual defines
for the GX and LX processors.   This patch just defineds MGEODE_LX for both
processors.  Also, fixed the following issues

- fixed up the MGEODEGX1 cache line size to the correct value.
- Removed GEODE_LX restrictions from IOAPIC and HIGHMEM (Alan Cox and others)
- Removed GEODE_LX define from the 3DNOW config option pending conclusive
  benchmark results that it increases performance (Alan Cox)
- Fix up the GX1/GX cpu init function so that it is cleaner and more correct.
  If anybody gets a NSC branded GX1 processor, it should jump into the
  init_cyrix and do the right thing. (Alan Cox)
- Updated the MAINTAINERS information (Adrian Bunk)

Index: linux-2.6.14-rc2-mm2/arch/i386/Kconfig
===================================================================
--- linux-2.6.14-rc2-mm2.orig/arch/i386/Kconfig
+++ linux-2.6.14-rc2-mm2/arch/i386/Kconfig
@@ -195,6 +195,7 @@ config M386
 	  - "Winchip-2" for IDT Winchip 2.
 	  - "Winchip-2A" for IDT Winchips with 3dNow! capabilities.
 	  - "GeodeGX1" for Geode GX1 (Cyrix MediaGX).
+	  - "Geode GX/LX" For AMD Geode GX and LX processors.
 	  - "CyrixIII/VIA C3" for VIA Cyrix III or VIA C3.
 	  - "VIA C3-2 for VIA C3-2 "Nehemiah" (model 9 and above).
 
@@ -327,6 +328,11 @@ config MGEODEGX1
 	help
 	  Select this for a Geode GX1 (Cyrix MediaGX) chip.
 
+config MGEODE_LX
+       bool "Geode GX/LX"
+       help
+         Select this for AMD Geode GX and LX processors.
+
 config MCYRIXIII
 	bool "CyrixIII/VIA-C3"
 	help
@@ -376,8 +382,8 @@ config X86_XADD
 config X86_L1_CACHE_SHIFT
 	int
 	default "7" if MPENTIUM4 || X86_GENERIC
-	default "4" if X86_ELAN || M486 || M386
-	default "5" if MWINCHIP3D || MWINCHIP2 || MWINCHIPC6 || MCRUSOE || MEFFICEON || MCYRIXIII || MK6 || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || M586 || MVIAC3_2 || MGEODEGX1
+	default "4" if X86_ELAN || M486 || M386 || MGEODEGX1
+	default "5" if MWINCHIP3D || MWINCHIP2 || MWINCHIPC6 || MCRUSOE || MEFFICEON || MCYRIXIII || MK6 || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || M586 || MVIAC3_2 || MGEODE_LX
 	default "6" if MK7 || MK8 || MPENTIUMM
 
 config RWSEM_GENERIC_SPINLOCK
@@ -446,7 +452,7 @@ config X86_INTEL_USERCOPY
 
 config X86_USE_PPRO_CHECKSUM
 	bool
-	depends on MWINCHIP3D || MWINCHIP2 || MWINCHIPC6 || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MK8 || MVIAC3_2 || MEFFICEON
+	depends on MWINCHIP3D || MWINCHIP2 || MWINCHIPC6 || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MK8 || MVIAC3_2 || MEFFICEON || MGEODE_LX
 	default y
 
 config X86_USE_3DNOW
Index: linux-2.6.14-rc2-mm2/arch/i386/kernel/cpu/amd.c
===================================================================
--- linux-2.6.14-rc2-mm2.orig/arch/i386/kernel/cpu/amd.c
+++ linux-2.6.14-rc2-mm2/arch/i386/kernel/cpu/amd.c
@@ -145,6 +145,13 @@ static void __init init_amd(struct cpuin
 					set_bit(X86_FEATURE_K6_MTRR, c->x86_capability);
 				break;
 			}
+
+			if ( c->x86_model == 10 ) {
+				/* AMD Geode LX is model 10 */
+				/* placeholder for any needed mods */
+				break;
+			}
+
 			break;
 
 		case 6: /* An Athlon/Duron */
Index: linux-2.6.14-rc2-mm2/include/linux/pci_ids.h
===================================================================
--- linux-2.6.14-rc2-mm2.orig/include/linux/pci_ids.h
+++ linux-2.6.14-rc2-mm2/include/linux/pci_ids.h
@@ -408,6 +408,13 @@
 #define PCI_DEVICE_ID_NS_SC1100_XBUS	0x0515
 #define PCI_DEVICE_ID_NS_87410		0xd001
 
+#define PCI_DEVICE_ID_NS_CS5535_HOST_BRIDGE  0x0028
+#define PCI_DEVICE_ID_NS_CS5535_ISA_BRIDGE   0x002b
+#define PCI_DEVICE_ID_NS_CS5535_IDE          0x002d
+#define PCI_DEVICE_ID_NS_CS5535_AUDIO        0x002e
+#define PCI_DEVICE_ID_NS_CS5535_USB          0x002f
+#define PCI_DEVICE_ID_NS_CS5535_VIDEO        0x0030
+
 #define PCI_VENDOR_ID_TSENG		0x100c
 #define PCI_DEVICE_ID_TSENG_W32P_2	0x3202
 #define PCI_DEVICE_ID_TSENG_W32P_b	0x3205
@@ -539,6 +546,9 @@
 #define PCI_DEVICE_ID_AMD_8151_0	0x7454
 #define PCI_DEVICE_ID_AMD_8131_APIC     0x7450
 
+#define PCI_DEVICE_ID_AMD_LX_VIDEO  0x2081
+#define PCI_DEVICE_ID_AMD_LX_AES    0x2082
+
 #define PCI_VENDOR_ID_TRIDENT		0x1023
 #define PCI_DEVICE_ID_TRIDENT_4DWAVE_DX	0x2000
 #define PCI_DEVICE_ID_TRIDENT_4DWAVE_NX	0x2001
Index: linux-2.6.14-rc2-mm2/MAINTAINERS
===================================================================
--- linux-2.6.14-rc2-mm2.orig/MAINTAINERS
+++ linux-2.6.14-rc2-mm2/MAINTAINERS
@@ -259,6 +259,13 @@ P:	Ivan Kokshaysky
 M:	ink@jurassic.park.msu.ru
 S:	Maintained for 2.4; PCI support for 2.6.
 
+AMD GEODE PROCESSOR/CHIPSET SUPPORT
+P:      Jordan Crouse
+M:      info-linux@geode.amd.com
+L:	info-linux@geode.amd.com
+W:	http://www.amd.com/us-en/ConnectivitySolutions/TechnicalResources/0,,50_2334_2452_11363,00.html
+S:	Supported
+
 APM DRIVER
 P:	Stephen Rothwell
 M:	sfr@canb.auug.org.au
Index: linux-2.6.14-rc2-mm2/arch/i386/kernel/cpu/cyrix.c
===================================================================
--- linux-2.6.14-rc2-mm2.orig/arch/i386/kernel/cpu/cyrix.c
+++ linux-2.6.14-rc2-mm2/arch/i386/kernel/cpu/cyrix.c
@@ -342,6 +342,36 @@ static void __init init_cyrix(struct cpu
 	return;
 }
 
+
+/* This function handles National Semiconductor branded processors */
+
+static void __init init_nsc(struct cpuinfo_x86 *c)
+{
+	int r;
+
+	/* There may be GX1 processors in the wild that are branded
+	 * NSC and not Cyrix.
+	 *
+	 * This function only handles the GX processor, and kicks every
+	 * thing else to the Cyrix init function above - that should
+	 * cover any processors that might have been branded differently
+	 * after NSC aquired Cyrix.
+	 *
+	 * If this breaks your GX1 horribly, please e-mail
+	 * info-linux@ldcmail.amd.com to tell us.
+	 */
+
+	/* Handle the GX (Formally known as the GX2) */
+
+	if ((c->x86 == 5) && (c->x86_model == 5)) {
+		r = get_model_name(c);
+		display_cacheinfo(c);
+	}
+	else
+		init_cyrix(c);
+}
+
+
 /*
  * Cyrix CPUs without cpuid or with cpuid not yet enabled can be detected
  * by the fact that they preserve the flags across the division of 5/2.
@@ -422,7 +452,7 @@ int __init cyrix_init_cpu(void)
 static struct cpu_dev nsc_cpu_dev __initdata = {
 	.c_vendor	= "NSC",
 	.c_ident 	= { "Geode by NSC" },
-	.c_init		= init_cyrix,
+	.c_init		= init_nsc,
 	.c_identify	= generic_identify,
 };
 
Index: linux-2.6.14-rc2-mm2/include/asm-i386/module.h
===================================================================
--- linux-2.6.14-rc2-mm2.orig/include/asm-i386/module.h
+++ linux-2.6.14-rc2-mm2/include/asm-i386/module.h
@@ -54,6 +54,8 @@ struct mod_arch_specific
 #define MODULE_PROC_FAMILY "VIAC3-2 "
 #elif defined CONFIG_MGEODEGX1
 #define MODULE_PROC_FAMILY "GEODEGX1 "
+#elif defined CONFIG_MGEODE_LX
+#define MODULE_PROC_FAMILY "GEODE "
 #else
 #error unknown processor family
 #endif

Re: [PATCH 1/5] AMD Geode GX/LX support V2

[Dave Hansen]

On Wed, 2005-10-05 at 10:54 -0600, Jordan Crouse wrote:
> +/* This function handles National Semiconductor branded processors */
> +
> +static void __init init_nsc(struct cpuinfo_x86 *c)
> +{
> +       int r;
> +
> +       /* There may be GX1 processors in the wild that are branded
> +        * NSC and not Cyrix.
> +        *
> +        * This function only handles the GX processor, and kicks
> every
> +        * thing else to the Cyrix init function above - that should
> +        * cover any processors that might have been branded
> differently
> +        * after NSC aquired Cyrix.
> +        *
> +        * If this breaks your GX1 horribly, please e-mail
> +        * info-linux@ldcmail.amd.com to tell us.
> +        */
> +
> +       /* Handle the GX (Formally known as the GX2) */
> +
> +       if ((c->x86 == 5) && (c->x86_model == 5)) {
> +               r = get_model_name(c);
> +               display_cacheinfo(c);
> +       }
> +       else
> +               init_cyrix(c);
> +}

CodingStyle.  Please keep the bracket and the else on the same line:

        if {
        	foo();
        } else
        	bar();
        
-- Dave

Re: [PATCH 1/5] AMD Geode GX/LX support V2

[Lennart Sorensen]

On Wed, Oct 05, 2005 at 10:54:05AM -0600, Jordan Crouse wrote:
> This patch combines the previous two patches which added individual defines
> for the GX and LX processors.   This patch just defineds MGEODE_LX for both
> processors.  Also, fixed the following issues
> 
> - fixed up the MGEODEGX1 cache line size to the correct value.
> - Removed GEODE_LX restrictions from IOAPIC and HIGHMEM (Alan Cox and others)
> - Removed GEODE_LX define from the 3DNOW config option pending conclusive
>   benchmark results that it increases performance (Alan Cox)
> - Fix up the GX1/GX cpu init function so that it is cleaner and more correct.
>   If anybody gets a NSC branded GX1 processor, it should jump into the
>   init_cyrix and do the right thing. (Alan Cox)
> - Updated the MAINTAINERS information (Adrian Bunk)

Which of those options apply to the SC1200 version of the geode and does
it use the same ide controller driver as the cs55x0 you had in your
previous patch?

There are starting to be too many geode's.  It's almost as confusing as
keeping track of Pentium models.

I currently build a 486 kernel for use on the sc1200 and it seems to run
pretty good that way.

Len Sorensen

Re: AMD Geode GX/LX support V2

[Jordan Crouse]

> Which of those options apply to the SC1200 version of the geode

if anything it would be the GEODEGX1 option, but i486 would work just as 
well.

> it use the same ide controller driver as the cs55x0 you had in your
> previous patch?

No - the SC1200 and GX1 use the cs5530 companion chip which has a different
IDE engine then the CS5535.

> I currently build a 486 kernel for use on the sc1200 and it seems to run
> pretty good that way.

Yes - as far as the kernel is concerned, the sc1200 should be very close to a
486.

Jordan

-- 
Jordan Crouse
Senior Linux Engineer
AMD - Personal Connectivity Solutions Group
<www.amd.com/embeddedprocessors>

Re: AMD Geode GX/LX support V2

[Lennart Sorensen]

On Wed, Oct 05, 2005 at 01:27:11PM -0600, Jordan Crouse wrote:
> if anything it would be the GEODEGX1 option, but i486 would work just as 
> well.

Well I may switch to the GX1 setting later when it actually appears in
the kernel.

> No - the SC1200 and GX1 use the cs5530 companion chip which has a different
> IDE engine then the CS5535.

So the SC1200 is a GX1 and CS5530 in one chip then (given the SC1200
doesn't need a companion chip)?  Currently I use the SC1200 ide driver.
So far no DMA, but that could be because I use compact flash on the ide
connector.  The card claims to support DMA though as far as I can tell.
or is the SCx200 using it's own ide system?

Len Sorensen

Re: AMD Geode GX/LX support V2

[John Zulauf]

On Wed, 2005-10-05 at 15:15 -0400, lsorense@csclub.uwaterloo.ca wrote:

> So the SC1200 is a GX1 and CS5530 in one chip then (given the SC1200
> doesn't need a companion chip)?  

*mostly*  The SCxx00 series does integrate the GX1 and CS5530 technology
but with some differences.  The GX1 supports a few higher graphics
resolutions, and the SCxx00 has some PCI bus speed options not supported
in the GX1/CS5530 version.  The timing values and modes are not the same
for the two IDE controllers.

Mark Lord did the initial submissions for CS5530 and SCxx00 series IDE
drivers and considered them different enough at the time to integrate
them separately (to the extant I recall).  (If you're still lurking
Mark, please feel free to correct me on any of this info.)

>From the x86 core standpoint they can be considered the same core w.r.t.
kernel configuration and capabilities -- same cacheline size, cache
size, capabilities bits (MMX, et. al.), as well as optimal scheduling
for the integer/FPU pipes.  We've found the compiling 486 is the best of
the gcc march's for the GX1/SCxx00 core.  It's unlikely that an GX1
specific scheduling will find it's way into gcc at this point.

> Currently I use the SC1200 ide driver.
> So far no DMA, but that could be because I use compact flash on the ide
> connector.  The card claims to support DMA though as far as I can tell.
> or is the SCx200 using it's own ide system?

The SC1200 should support DMA, though there may be some restrictions if
DMA and non-DMA devices are connected at the same time (i.e. it may
revert to lowest-common-mode).



-- 
John Zulauf
Senior MTS, Embedded Core Software
Advanced Micro Devices, Inc.
1351 So Sunset St
Longmont, CO 80501

303 774 5166 office
303 774 5801 fax

[PATCH 2/5] AMD Geode GX/LX support V2

[Jordan Crouse]

No changes to this patch from V1, but included to keep from confusing
anybody.

This is a simple patch that fixes console APM blanking on the GX/LX
platforms with BIOSes that still support APM.  Please apply against
linux-2.4.14-rc2-mm2.

Index: linux-2.6.14-rc2-mm2/arch/i386/kernel/apm.c
===================================================================
--- linux-2.6.14-rc2-mm2.orig/arch/i386/kernel/apm.c
+++ linux-2.6.14-rc2-mm2/arch/i386/kernel/apm.c
@@ -1057,22 +1057,23 @@ static int apm_engage_power_management(u
  
 static int apm_console_blank(int blank)
 {
-	int	error;
-	u_short	state;
+	int error, i;
+	u_short state;
+	u_short dev[3] = { 0x100, 0x1FF, 0x101 };
 
 	state = blank ? APM_STATE_STANDBY : APM_STATE_READY;
-	/* Blank the first display device */
-	error = set_power_state(0x100, state);
-	if ((error != APM_SUCCESS) && (error != APM_NO_ERROR)) {
-		/* try to blank them all instead */
-		error = set_power_state(0x1ff, state);
-		if ((error != APM_SUCCESS) && (error != APM_NO_ERROR))
-			/* try to blank device one instead */
-			error = set_power_state(0x101, state);
+
+	for (i = 0; i < 3; i++) {
+		error = set_power_state(dev[i], state);
+
+		if ((error == APM_SUCCESS) || (error == APM_NO_ERROR))
+			return 1;
+
+		if (error == APM_NOT_ENGAGED)
+			break;
 	}
-	if ((error == APM_SUCCESS) || (error == APM_NO_ERROR))
-		return 1;
-	if (error == APM_NOT_ENGAGED) {
+
+	if (error == APM_NOT_ENGAGED && state != APM_STATE_READY) {
 		static int tried;
 		int eng_error;
 		if (tried++ == 0) {

[PATCH 3/5] AMD Geode GX/LX support V2

[Jordan Crouse]

No changes to this patch from the previous version, but included to
keep from confusing anybody.

The 5535 has a muxed serial port that can either be used to drive GPIO pins
or a second 16550 UART.  This code enables that UART via a command line
option.
This is most often used with a dongle attached to the VGA port to provide a
a serial port on boards with no dedicated serial goesouta. Please apply
against linux-2.6.13-rc2-mm2.

Index: linux-2.6.14-rc2-mm2/drivers/serial/Kconfig
===================================================================
--- linux-2.6.14-rc2-mm2.orig/drivers/serial/Kconfig
+++ linux-2.6.14-rc2-mm2/drivers/serial/Kconfig
@@ -608,6 +608,17 @@ config SERIAL_AU1X00_CONSOLE
 	  If you have an Alchemy AU1X00 processor (MIPS based) and you want
 	  to use a console on a serial port, say Y.  Otherwise, say N.
 
+config SERIAL_GEODE_UART2
+	bool "Enable AMD CS5535 UART2 as a serial port"
+	depends on MGEODE_LX
+	default y
+	select SERIAL_CORE
+	help
+	  Select this to allow the user to select the secondary CS5535 UART
+	  as a 16550 serial port instead of the default DDC interface. The
+	  UART2 can be selected by specifying geodeuart2 on the command
+	  line.
+
 config SERIAL_CORE
 	tristate
 
Index: linux-2.6.14-rc2-mm2/drivers/serial/Makefile
===================================================================
--- linux-2.6.14-rc2-mm2.orig/drivers/serial/Makefile
+++ linux-2.6.14-rc2-mm2/drivers/serial/Makefile
@@ -56,3 +56,4 @@ obj-$(CONFIG_SERIAL_JSM) += jsm/
 obj-$(CONFIG_SERIAL_TXX9) += serial_txx9.o
 obj-$(CONFIG_SERIAL_VR41XX) += vr41xx_siu.o
 obj-$(CONFIG_SERIAL_SGI_IOC4) += ioc4_serial.o
+obj-$(CONFIG_SERIAL_GEODE_UART2) += cs5535_uart.o
Index: linux-2.6.14-rc2-mm2/drivers/serial/cs5535_uart.c
===================================================================
--- /dev/null
+++ linux-2.6.14-rc2-mm2/drivers/serial/cs5535_uart.c
@@ -0,0 +1,83 @@
+/*
+ * Copyright (c) 2004-2005 Advanced Micro Devices, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called COPYING
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <asm/msr.h>
+#include <asm/io.h>
+
+/* The CS5535 companion chip has two UARTs.  This code enables the second
+   UART so other devices can use it.  We do it here so we can expose the
+   port early enough for serial debugging
+*/
+
+/* Note - this does not check to see if the CS5535 actually exists */
+
+#define LO(b)  (((1 << b) << 16) | 0x0000)
+#define HI(b)  ((0x0000 << 16) | (1 << b))
+
+static u32 outtab[16] __initdata =
+{
+	0x00,HI(4), 0x04,HI(4), 0x08,HI(4),
+	0x0c,LO(4), 0x10,HI(4), 0x14,LO(4),
+	0x18,LO(4), 0x1C,LO(4)
+};
+
+static u32 intab[16] __initdata = {
+	0x20,HI(3), 0x24,LO(3), 0x28,LO(3),
+	0x2C,LO(3), 0x34,HI(3), 0x38,LO(3),
+     0x40,LO(3), 0x44,LO(3)
+};
+
+static int __init init_cs5535_uart2(char *str)
+{
+	u32 lo = 0, hi = 0;
+	u32 base; u32 i;
+
+	/* Enable UART2 instead of DDC */
+
+	rdmsr(0x51400014, lo, hi);
+	lo &= 0xFF8FFFFF;
+	lo |= 0x00500000;   /* 0x2F8 ttyS1 */
+	wrmsr(0x51400014, lo, hi);
+
+	/* Set up the UART registers */
+	wrmsr(0x5140003E, 0x12, 0x00);
+
+	rdmsr(0x5140000C, lo, hi);
+	base = (u32)(lo & 0xFF00);
+
+	/* Enable the GPIO pins (in and out) */
+
+	for(i = 0; i < 16; i += 2) {
+		outl(outtab[i + 1], base + outtab[i]);
+		outl(intab[i + 1], base + intab[i]);
+	}
+
+	/* Enable the IRQ */
+
+	rdmsr(0x51400021,lo,hi);
+	lo &= 0x0FFFFFFF;
+	lo |= 0x30000000; /* IRQ 3 */
+	wrmsr(0x51400021,lo,hi);
+}
+
+__setup("geodeuart2", init_cs5535_uart2);

[PATCH 4/5] AMD Geode GX/LX support V2

[Jordan Crouse]

Patch for the AMD LX RNG device.  Changelog:

- Remove defines, style cleanups (Vladis Kletnieks, Alan Cox, Andi Kleen)
- Replace pointer derefrences with readl (Vladis, Alan and Andi again)
- Add asserts to protect against NULL dereferences (Vladis)


Index: linux-2.6.14-rc2-mm2/drivers/char/hw_random.c
===================================================================
--- linux-2.6.14-rc2-mm2.orig/drivers/char/hw_random.c
+++ linux-2.6.14-rc2-mm2/drivers/char/hw_random.c
@@ -1,4 +1,9 @@
 /*
+        Added support for the AMD Geode LX RNG
+	(c) Copyright 2004-2005 Advanced Micro Devices, Inc.
+
+	derived from
+
  	Hardware driver for the Intel/AMD/VIA Random Number Generators (RNG)
 	(c) Copyright 2003 Red Hat Inc <jgarzik@redhat.com>
  
@@ -95,6 +100,11 @@ static unsigned int via_data_present (vo
 static u32 via_data_read (void);
 #endif
 
+static int __init geode_init(struct pci_dev *dev);
+static void geode_cleanup(void);
+static unsigned int geode_data_present (void);
+static u32 geode_data_read (void);
+
 struct rng_operations {
 	int (*init) (struct pci_dev *dev);
 	void (*cleanup) (void);
@@ -122,6 +132,7 @@ enum {
 	rng_hw_intel,
 	rng_hw_amd,
 	rng_hw_via,
+	rng_hw_geode,
 };
 
 static struct rng_operations rng_vendor_ops[] = {
@@ -139,6 +150,9 @@ static struct rng_operations rng_vendor_
 	/* rng_hw_via */
 	{ via_init, via_cleanup, via_data_present, via_data_read, 1 },
 #endif
+
+	/* rng_hw_geode */
+	{ geode_init, geode_cleanup, geode_data_present, geode_data_read, 4 }
 };
 
 /*
@@ -159,6 +173,9 @@ static struct pci_device_id rng_pci_tbl[
 	{ 0x8086, 0x244e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, rng_hw_intel },
 	{ 0x8086, 0x245e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, rng_hw_intel },
 
+	{ PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_LX_AES,
+	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, rng_hw_geode },
+
 	{ 0, },	/* terminate list */
 };
 MODULE_DEVICE_TABLE (pci, rng_pci_tbl);
@@ -460,6 +477,53 @@ static void via_cleanup(void)
 }
 #endif
 
+/***********************************************************************
+ *
+ * AMD Geode RNG operations
+ *
+ */
+
+static void __iomem *geode_rng_base = NULL;
+
+#define GEODE_RNG_DATA_REG   0x50
+#define GEODE_RNG_STATUS_REG 0x54
+
+static u32 geode_data_read(void)
+{
+	u32 val;
+	assert(geode_rng_base != NULL);
+	val = readl(geode_rng_base + GEODE_RNG_DATA_REG);
+	return val;
+}
+
+static unsigned int geode_data_present(void)
+{
+	u32 val;
+	assert(geode_rng_base != NULL);
+	val = readl(geode_rng_base + GEODE_RNG_STATUS_REG);
+	return val;
+}
+
+static void geode_cleanup(void)
+{
+	iounmap(geode_rng_base);
+  	geode_rng_base = NULL;
+}
+
+static int geode_init(struct pci_dev *dev)
+{
+	unsigned long rng_base = pci_resource_start(dev, 0);
+	if (rng_base == NULL) return 1;
+
+	geode_rng_base = ioremap(rng_base, 0x58);
+
+	if (geode_rng_base == NULL) {
+		printk(KERN_ERR PFX "Cannot ioremap RNG memory\n");
+		return -EBUSY;
+	}
+
+	return 0;
+}
 
 /***********************************************************************
  *
@@ -574,7 +638,7 @@ static int __init rng_init (void)
 
 	DPRINTK ("ENTER\n");
 
-	/* Probe for Intel, AMD RNGs */
+	/* Probe for Intel, AMD, Geode RNGs */
 	for_each_pci_dev(pdev) {
 		ent = pci_match_id(rng_pci_tbl, pdev);
 		if (ent) {

[PATCH 5/5] AMD Geode GX/LX support V2

[Jordan Crouse]

No changes to the previous version, added here for completeness.

The core IDE engine on the CS5536 is the same as the other AMD southbridges,
so unlike the CS5535, we can simply add the appropriate PCI headers to
the existing amd74xx code.  Please apply against linux-2.6.14-rc2-mm2.


Index: linux-2.6.14-rc2-mm2/drivers/ide/pci/amd74xx.c
===================================================================
--- linux-2.6.14-rc2-mm2.orig/drivers/ide/pci/amd74xx.c
+++ linux-2.6.14-rc2-mm2/drivers/ide/pci/amd74xx.c
@@ -74,6 +74,7 @@ static struct amd_ide_chip {
 	{ PCI_DEVICE_ID_NVIDIA_NFORCE_MCP04_IDE,	0x50, AMD_UDMA_133 },
 	{ PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_IDE,	0x50, AMD_UDMA_133 },
 	{ PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_IDE,	0x50, AMD_UDMA_133 },
+	{ PCI_DEVICE_ID_AMD_CS5536_IDE,             0x40, AMD_UDMA_100 },
 	{ 0 }
 };
 
@@ -491,6 +492,7 @@ static ide_pci_device_t amd74xx_chipsets
 	/* 14 */ DECLARE_NV_DEV("NFORCE-MCP04"),
 	/* 15 */ DECLARE_NV_DEV("NFORCE-MCP51"),
 	/* 16 */ DECLARE_NV_DEV("NFORCE-MCP55"),
+	/* 17 */ DECLARE_AMD_DEV("AMD5536"),
 };
 
 static int __devinit amd74xx_probe(struct pci_dev *dev, const struct pci_device_id *id)
@@ -527,6 +529,7 @@ static struct pci_device_id amd74xx_pci_
 	{ PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP04_IDE,	PCI_ANY_ID, PCI_ANY_ID, 0, 0, 14 },
 	{ PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_IDE,	PCI_ANY_ID, PCI_ANY_ID, 0, 0, 15 },
 	{ PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_IDE,	PCI_ANY_ID, PCI_ANY_ID, 0, 0, 16 },
+	{ PCI_VENDOR_ID_AMD,    PCI_DEVICE_ID_AMD_CS5536_IDE, 	        PCI_ANY_ID, PCI_ANY_ID, 0, 0, 17 },
 	{ 0, },
 };
 MODULE_DEVICE_TABLE(pci, amd74xx_pci_tbl);
Index: linux-2.6.14-rc2-mm2/include/linux/pci_ids.h
===================================================================
--- linux-2.6.14-rc2-mm2.orig/include/linux/pci_ids.h
+++ linux-2.6.14-rc2-mm2/include/linux/pci_ids.h
@@ -549,6 +549,15 @@
 #define PCI_DEVICE_ID_AMD_LX_VIDEO  0x2081
 #define PCI_DEVICE_ID_AMD_LX_AES    0x2082
 
+#define PCI_DEVICE_ID_AMD_CS5536_ISA    0x2090
+#define PCI_DEVICE_ID_AMD_CS5536_FLASH  0x2091
+#define PCI_DEVICE_ID_AMD_CS5536_AUDIO  0x2093
+#define PCI_DEVICE_ID_AMD_CS5536_OHC    0x2094
+#define PCI_DEVICE_ID_AMD_CS5536_EHC    0x2095
+#define PCI_DEVICE_ID_AMD_CS5536_UDC    0x2096
+#define PCI_DEVICE_ID_AMD_CS5536_UOC    0x2097
+#define PCI_DEVICE_ID_AMD_CS5536_IDE    0x209A
+
 #define PCI_VENDOR_ID_TRIDENT		0x1023
 #define PCI_DEVICE_ID_TRIDENT_4DWAVE_DX	0x2000
 #define PCI_DEVICE_ID_TRIDENT_4DWAVE_NX	0x2001