From: Ravikiran G Thirumalai <kiran@scalex86.org>
To: Andi Kleen <ak@suse.de>
Cc: Andrew Morton <akpm@osdl.org>,
linux-kernel@vger.kernel.org, discuss@x86-64.org,
zach@vmware.com, shai@scalex86.org, nippung@calsoftinc.com
Subject: Re: [discuss] [patch] x86_64: align and pad x86_64 GDT on page boundary
Date: Thu, 8 Dec 2005 13:55:14 -0800 [thread overview]
Message-ID: <20051208215514.GE3776@localhost.localdomain> (raw)
In-Reply-To: <20051208201518.GN11190@wotan.suse.de>
On Thu, Dec 08, 2005 at 09:15:18PM +0100, Andi Kleen wrote:
> On Thu, Dec 08, 2005 at 11:42:32AM -0800, Ravikiran G Thirumalai wrote:
> >
> > - .align L1_CACHE_BYTES
> > + /* zero the remaining page */
> > + .fill PAGE_SIZE / 8 - GDT_ENTRIES,8,0
> > +
> > ENTRY(idt_table)
>
> Why can't the IDT not be shared with the GDT page? It should be mostly
> read only right and putting r-o data on that page should be ok, right?
Yes, you are right. This should not have been a problem.
Some people reported this symbol (cpu_gdt) though. Will have to go back and
check.
Thanks,
Kiran
next prev parent reply other threads:[~2005-12-08 21:55 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2005-12-08 19:42 [patch] x86_64: align and pad x86_64 GDT on page boundary Ravikiran G Thirumalai
2005-12-08 20:15 ` [discuss] " Andi Kleen
2005-12-08 21:55 ` Ravikiran G Thirumalai [this message]
2005-12-08 23:09 ` Rohit Seth
2005-12-08 23:11 ` Andi Kleen
2005-12-08 23:26 ` Rohit Seth
2005-12-08 23:26 ` Andi Kleen
2005-12-08 23:45 ` Rohit Seth
2005-12-08 23:43 ` Andi Kleen
2005-12-09 22:19 ` Ravikiran G Thirumalai
2005-12-09 22:57 ` Andi Kleen
2005-12-09 23:01 ` Rohit Seth
2005-12-09 22:59 ` Andi Kleen
2005-12-09 23:46 ` Ravikiran G Thirumalai
2005-12-12 2:34 ` Zwane Mwaikambo
2005-12-12 2:31 ` Andi Kleen
2005-12-12 2:38 ` Zwane Mwaikambo
2005-12-08 23:50 ` Rohit Seth
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