[PATCH] Fix CPU hotplug with new time infrastructure

[PATCH] Fix CPU hotplug with new time infrastructure

[Zwane Mwaikambo]

tsc_disable was marked __initdata so we were accessing random data (which 
happened to have a set bit) so upon warm cpu online we would disable the 
TSC, resulting in the following. Nathan does this fix your triple fault?

root@arusha cpu1 {0:0} echo 1 > online
Booting processor 1/1 eip 3000
Disabling TSC...
Calibrating delay using timer specific routine.. 797.62 BogoMIPS 
(lpj=3988115)
CPU1: Intel Pentium II (Deschutes) stepping 02
migration_cost=2595
root@arusha cpu1 {0:0} ps
  PID TTY          TIME CMD
 2432 ttyS0    00:00:00 tcsh
 2490 ttyS0    00:00:00 ps
root@arusha cpu1 {0:0} ps
Segmentation fault
root@arusha cpu1 {0:139}

<signed-off-by> Zwane Mwaikambo <zwane@arm.linux.org.uk>

Index: linux-2.6.16-rc2-mm1/arch/i386/kernel/tsc.c
===================================================================
RCS file: /home/cvsroot/linux-2.6.16-rc2-mm1/arch/i386/kernel/tsc.c,v
retrieving revision 1.1.1.1
diff -u -p -B -r1.1.1.1 tsc.c
--- linux-2.6.16-rc2-mm1/arch/i386/kernel/tsc.c	11 Feb 2006 16:55:15 -0000	1.1.1.1
+++ linux-2.6.16-rc2-mm1/arch/i386/kernel/tsc.c	12 Feb 2006 22:00:12 -0000
@@ -25,7 +25,7 @@
  */
 unsigned int tsc_khz;
 
-int tsc_disable __initdata = 0;
+int tsc_disable __cpuinitdata = 0;
 
 #ifdef CONFIG_X86_TSC
 static int __init tsc_setup(char *str)

Re: [PATCH] Fix CPU hotplug with new time infrastructure

[Nathan Lynch]

Zwane Mwaikambo wrote:
> tsc_disable was marked __initdata so we were accessing random data (which 
> happened to have a set bit) so upon warm cpu online we would disable the 
> TSC, resulting in the following. Nathan does this fix your triple fault?

Doesn't apply to latest -linus, which is where I've been seeing that.
I found tsc_disable in arch/i386/kernel/timers/timer_tsc.c, but it's
marked __devinitdata.

So my problem would appear to be something different; I'll try to get
more information, thanks.


> root@arusha cpu1 {0:0} echo 1 > online
> Booting processor 1/1 eip 3000
> Disabling TSC...
> Calibrating delay using timer specific routine.. 797.62 BogoMIPS 
> (lpj=3988115)
> CPU1: Intel Pentium II (Deschutes) stepping 02
> migration_cost=2595
> root@arusha cpu1 {0:0} ps
>   PID TTY          TIME CMD
>  2432 ttyS0    00:00:00 tcsh
>  2490 ttyS0    00:00:00 ps
> root@arusha cpu1 {0:0} ps
> Segmentation fault
> root@arusha cpu1 {0:139}
> 
> <signed-off-by> Zwane Mwaikambo <zwane@arm.linux.org.uk>
> 
> Index: linux-2.6.16-rc2-mm1/arch/i386/kernel/tsc.c
> ===================================================================
> RCS file: /home/cvsroot/linux-2.6.16-rc2-mm1/arch/i386/kernel/tsc.c,v
> retrieving revision 1.1.1.1
> diff -u -p -B -r1.1.1.1 tsc.c
> --- linux-2.6.16-rc2-mm1/arch/i386/kernel/tsc.c	11 Feb 2006 16:55:15 -0000	1.1.1.1
> +++ linux-2.6.16-rc2-mm1/arch/i386/kernel/tsc.c	12 Feb 2006 22:00:12 -0000
> @@ -25,7 +25,7 @@
>   */
>  unsigned int tsc_khz;
>  
> -int tsc_disable __initdata = 0;
> +int tsc_disable __cpuinitdata = 0;
>  
>  #ifdef CONFIG_X86_TSC
>  static int __init tsc_setup(char *str)
> -
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