From: Brice Goglin <brice@myri.com>
To: linux-pci@atrey.karlin.mff.cuni.cz
Cc: linux-kernel@vger.kernel.org
Subject: [PATCH 2/6] Rename PCI_CAP_ID_HT_IRQCONF into PCI_CAP_ID_HT
Date: Tue, 20 Jun 2006 22:32:02 -0400 [thread overview]
Message-ID: <20060621023201.GB16292@myri.com> (raw)
In-Reply-To: <20060621023104.GA16271@myri.com>
[PATCH 2/6] Rename PCI_CAP_ID_HT_IRQCONF into PCI_CAP_ID_HT
0x08 is the HT capability, while PCI_CAP_ID_HT_IRQCONF would be
the subtype 0x80 that mpic_scan_ht_pic() uses.
Rename PCI_CAP_ID_HT_IRQCONF into PCI_CAP_ID_HT.
Signed-off-by: Brice Goglin <brice@myri.com>
---
arch/powerpc/sysdev/mpic.c | 2 +-
include/linux/pci_regs.h | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
Index: linux-mm/arch/powerpc/sysdev/mpic.c
===================================================================
--- linux-mm.orig/arch/powerpc/sysdev/mpic.c 2006-06-20 22:02:04.000000000 -0400
+++ linux-mm/arch/powerpc/sysdev/mpic.c 2006-06-20 22:03:28.000000000 -0400
@@ -250,7 +250,7 @@
for (pos = readb(devbase + PCI_CAPABILITY_LIST); pos != 0;
pos = readb(devbase + pos + PCI_CAP_LIST_NEXT)) {
u8 id = readb(devbase + pos + PCI_CAP_LIST_ID);
- if (id == PCI_CAP_ID_HT_IRQCONF) {
+ if (id == PCI_CAP_ID_HT) {
id = readb(devbase + pos + 3);
if (id == 0x80)
break;
Index: linux-mm/include/linux/pci_regs.h
===================================================================
--- linux-mm.orig/include/linux/pci_regs.h 2006-06-20 22:02:04.000000000 -0400
+++ linux-mm/include/linux/pci_regs.h 2006-06-20 22:03:28.000000000 -0400
@@ -196,7 +196,7 @@
#define PCI_CAP_ID_MSI 0x05 /* Message Signalled Interrupts */
#define PCI_CAP_ID_CHSWP 0x06 /* CompactPCI HotSwap */
#define PCI_CAP_ID_PCIX 0x07 /* PCI-X */
-#define PCI_CAP_ID_HT_IRQCONF 0x08 /* HyperTransport IRQ Configuration */
+#define PCI_CAP_ID_HT 0x08 /* HyperTransport */
#define PCI_CAP_ID_VNDR 0x09 /* Vendor specific capability */
#define PCI_CAP_ID_SHPC 0x0C /* PCI Standard Hot-Plug Controller */
#define PCI_CAP_ID_EXP 0x10 /* PCI Express */
next prev parent reply other threads:[~2006-06-21 2:32 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2006-06-21 2:31 [PATCH 0/6] Improve MSI detection v3 Brice Goglin
2006-06-21 2:31 ` [PATCH 1/6] Merge existing MSI disabling quirks Brice Goglin
2006-06-21 2:32 ` Brice Goglin [this message]
2006-06-21 2:32 ` [PATCH 3/6] Blacklist PCI-E chipsets depending on Hypertransport MSI capabality Brice Goglin
2006-06-22 13:56 ` [PATCH 3/6 v4] " Brice Goglin
2006-06-21 2:32 ` [PATCH 4/6] Factorize common MSI detection code from pci_enable_msi() and msix() Brice Goglin
2006-06-21 2:32 ` [PATCH 5/6] Stop inheriting bus flags and check root chipset bus flags instead Brice Goglin
2006-06-21 2:33 ` [PATCH 6/6] Drop pci_msi_quirk Brice Goglin
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